Implementing the Internet Checksum in Hardware (RFC1936)
Original Publication Date: 1996-Apr-01
Included in the Prior Art Database: 2000-Sep-13
Internet Society Requests For Comment (RFCs)
This memo presents a techniques for efficiently implementing the Internet Checksum in hardware. It includes PLD code for programming a single, low cost part to perform checksumming at 1.26 Gbps.
Network Working Group J. Touch
Request For Comments: 1936 B. Parham
Category: Informational ISI
Implementing the Internet Checksum in Hardware
Status of This Memo
This memo provides information for the Internet community. This memo
does not specify an Internet standard of any kind. Distribution of
this memo is unlimited.
This memo presents a techniques for efficiently implementing the
Internet Checksum in hardware. It includes PLD code for programming a
single, low cost part to perform checksumming at 1.26 Gbps.
The Internet Checksum is used in various Internet protocols to check
for data corruption in headers (e.g., IP)  and packet bodies (e.g,
UDP, TCP) . Efficient software implementation of this checksum
has been addressed in previous RFCs .
Efficient software implementations of the Internet Checksum algorithm
are often embedded in data copying operations (, Section 2). This
copy operation is increasingly being performed by dedicated direct
memory access (DMA) hardware. As a result, DMA hardware designs are
beginning to incorporate dedicated hardware to compute the Internet
Checksum during the data transfer.
This note presents the architecture of an efficient, pipelined
Internet Checksum mechanism, suitable for inclusion in DMA hardware
. This design can be implemented in a relatively inexpensive
programmable logic device (PLD) (1995 cost of $40), and is capable of
supporting 1.26 Gbps transfer rates, at 26 ns per 32-bit word.
Appendix A provides the pseudocode for such a device. This design has
been implemented in the PC-ATOMIC host interface hardware . We
believe this design is of general use to the Internet community.
The remainder of this document is organized as follows:
Review of the Internet Checksum
One's Complement vs. Two's Complement Addition
Appendix A - PLD source code
A Review of the Internet Checksum
The Internet Checksum is used for detecting corruption in a block of
data . It is initialized to zero, and computed as the complement
of the ones-complement sum of the data, taken in 16-bit units. A
subsequent checksum of the data and checksum together should generate
a zero checksum if no errors are detected.
The checksum allows :
- byte order "independence"
reordered output is equivalent to reordered input
- 16-bit word-order independence
reordering 16-bit words preserves the output
- incremental computation
- deferred carries
- parallel summation
a result of deferred carries, incremental
computation, and 16-bit ...