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EFFICIENT METHOD FOR SQUARE ROOT HARDWARE IMPLEMENTATION

IP.com Disclosure Number: IPCOM000004629D
Original Publication Date: 2001-Mar-01
Included in the Prior Art Database: 2001-Mar-01
Document File: 2 page(s) / 24K

Publishing Venue

Motorola

Related People

Jean-Frederic Chiron: AUTHOR

Abstract

EFFICIENT METHOD FOR SQUARE ROOT HARDWARE IMPLEMENTATION

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EFFICIENT METHOD FOR SQUARE ROOT HARDWARE IMPLEMENTATION

By Jean-Frederic Chiron

[Note: The accompanying PDF contains the full document, including equations and figures that are not present in this file of searchable text.]

The use in recent cellular communication systems of high bit rate non constant enveloppe digital modulation has increased mobile transmitter complexity to keep good performance. Precise power control circuitry, and even efficiency improvement techniques using drain voltage modulation like 'Enveloppe Following' or 'Enveloppe Elimination and Reconstruction' are part of the new functionnality needed for those standarts. All those techniques are based on the knowledge of the signal enveloppe that can be calculated digitally from the I and Q baseband signals using square and square root functions using the relation (see accompanying PDF for equation). The main roadblock to implement on silicon such system is a real time square root calculation with a good precision.

EXISTING SQUARE ROOT CALCULATION TECHNIQUES

Current methods to implement square root algorithm usually belong to too categories:

Iterative method (like Newton-Raphson), are used to obtain high precision results but requires a lots of calculations thus a lot of clock cycles to get the result. Therefore, those methods are not really adapted to 'on silicon' real time calculation for cheap products.

Look-up table based method, used to get square root first order approximation, but the precision can be quite poor if the size of the table is reduced compared to size of the word to process.

PROPOSED SOLUTION TO THE PROBLEM

The method presented thereafter for square root calculation is look-up table based. To reduce the size of the table without compromising result precision, two techniques are used:

Linear interpolation between table points.

Use of the following mathematical property of square root function to reduce the size of the table: (see accompanying PDF for equation) to optimize complexity for binary calculations (see accompanying PDF for equation) is chosen, thus (see accompanying PDF for equation). Doing so allows to store in the table x values in (see accompanying PDF for equation) for a N bits input.

The technique works in the following way:

1. For the N bits x input word, find k so that (see accompanying PDF for equation).

2. Left shift x by 2.k positions : (see accompanying PDF for equation).

3. Apply linear interpolation using reduced look-up table to z, this gives (see accompanying PDF for equation).

4. Right shift s by k positions, this gives (see accompanying PDF for equation).

[See accompanying PDF for Figure]

Looking to the figure above shows that when precision is dictated by the low values of input variable (x), the size of the lookup table stays very small compared to what would be needed for a equally spaced...