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DUAL FLAG CONCEPT FOR HIGH RELIABILITY POWER PACKAGE IN MULTICHIP INTEGRATED CIRCUITS

IP.com Disclosure Number: IPCOM000004780D
Original Publication Date: 2001-May-17
Included in the Prior Art Database: 2001-May-17
Document File: 2 page(s) / 359K

Publishing Venue

Motorola

Related People

Philippe Perruchoud: AUTHOR [+2]

Abstract

DUAL FLAG CONCEPT FOR HIGH RELIABILITY POWER PACKAGE IN MULTICHIP INTEGRATED CIRCUITS

This text was extracted from a WORD97 document.
This is the abbreviated version, containing approximately 93% of the total text.

DUAL FLAG CONCEPT FOR HIGH RELIABILITY POWER PACKAGE IN MULTICHIP INTEGRATED CIRCUITS

By Philippe Perruchoud and Daniel Berail

PROBLEM

The number of electronic components in modern cars is increasing every year, and Automotive electronic designers are faced with the problem of sleep steady state power consumption on the devices that are permanently connected to the battery voltage. If not well designed electronic devices could drain the car battery of its charge in a couple of days. For this reason, devices with standby current as low as 10µA over the entire operating temperature range are necessary.

Another requirement is the need to increase the capability of surface mount packages to sustain higher temperature profile during solder reflow at the board level. Although JEDEC JA113 specification only requires a 220°C (+5°C/-0°C) peak reflow temperature at this time, automotive customers frequently require 235°C, or even 245°C peak reflow temperature. This reflow is very stressful on the package especially for dual die devices where the mechanical stress may be conveyed from one die to the other.

SOLUTION

In the current Multichip Power Package (Fig. 1), the Power die is attached to the heatslug with solder to insure a good thermal as well as a good current conducting path, since the backside drain of the Power die is connected to Vbatt through the heatslug. Because the backside of the Control die is substrate Ground and the backside of the Power die is connected to battery voltage, they need to be electrically insulated one from the other. This is done by using a non conductive epoxy to attach the control die.

In the Dual Flag concept, a major improvement in electrical and mechanical stress isolation is obtained by having the control die mounted on an additional flag extended from the original lead frame. This flag is actually hanging over the heatslug as shown on Fig 2.

Because the additional flag is totally separated from the heatslug, complete insulation is insured between the two dice, removing the possibility of any current leakage path. In addition, a more standard conductive type of epoxy can be used to attach the Control Die increasing manufacturability and reducing cost.

This complete separation the mechanical stress that one die exercises on the other which increases the robustness of the package during IR reflow. The addition of locks near the ends of the upper flag area reduces the possible delamination on the lead frame preventing moisture ingress.

Another advantage of this solution is the fact that the outline of the package is exactly identical to the current design, preventing the need for customers to modify the layout of their board.

By utilizing a new dual flag stamped lead frame, standard processes and material, and existing manufacturing lines, a very cost effective package solution is realized that enables us to reach the...