Browse Prior Art Database

Morphable Functional Units

IP.com Disclosure Number: IPCOM000004783D
Original Publication Date: 2001-May-21
Included in the Prior Art Database: 2001-May-21
Document File: 3 page(s) / 87K

Publishing Venue

Motorola

Related People

Mike Schutte: AUTHOR [+3]

Related Documents

"Optimal Circuits for Parallel Multipliers": OTHER

Abstract

Morphable Functional Units

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1

Morphable Functional Units

Mike Schutte, Phil May, and Silviu Chiricescu

The general problem addressed by this invention is to improvethe cost performance of CPU's. The approach taken in this invention is to make use of otherwise idle hardware to perform computations required by the ex- ecuting application, thereby improving the performance of the application.

The invention at hand is based on the concept of "mor- phable function units" MFU's. Before discussing the MFU concept, a small set of terms must be de ned. First, a functional unit (FU) is a set of logic that ap- plies one or more functions to a set of inputs to produce a set of outputs. For purposes of this invention, a func- tion shall be limited to the types of functions found in a typical CPU data path, e.g. addition/subtraction, mul- tiplication, division, logical AND, logical OR, shift, etc.

This allows us to classify functions according to function type and a set of attributes: data type oating point, integer), input data size (8-bit, 16-bit, 32-bit, ), out- put data size, data source (bus A[0-7], signal B, ), saturating/non-saturating output, etc. The MFU con- cept is not restricted to functions of a particular type(s) or attribute(s).

MFU's have ve de ning characteristics: 1. An MFU is an FU that is capable of operating in two or more modes. Eachmodeis de ned by a unique set of data path functions that the MFU can execute simultaneously. For purposes of the de nition of MFU, two sets of functions are not the same when one of the sets contains at least one function that is not the same as any function contained in the other set. Two functions are the same if they match in function type and data type. 2. The set of modes and the set of functions belonging to each mode are xed, that is they are de ned at the time of design of the MFU and do not change during its operation. Within amode the functions that the MFU performs may operate in parallel or pipelined fashion or anycombination thereof. 3. The hardware used to implement the set of functions in at least one mode of the MFU is substantially reused to implement the set of functions in at least one of the other MFU modes. 4. The hardware used is not based upon entirely regular array(s) of logic tiles or an entirely regular interconnect. 5. The hardware used to implement the set of functions contained in all modes of the MFU is customized to im- plement only those functions.

Characteristic 1 di erentiates MFU's from SIMD FU's, where all functions in both modes are the same. Charac-

teristics 2 and 4 di erentiate MFU implementations from FPGA-based implementations as the set of functions for which the MFU is designed is known at design time and the implementation is customized targeting those func- tions. Characteristic 3 di erentiates an MFU implemen- tation from that of a conventional multi-function ALU, as typically the only hardware reused throughout ALU's modes is multiplexing hardware to route inputs/outputs to/from its separate FU's.