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CACHE POWER-SAVING TECHNIQUE USING PARTIAL TAG MATCHING

IP.com Disclosure Number: IPCOM000005123D
Publication Date: 2001-Aug-15
Document File: 4 page(s) / 118K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for reducing the power consumption of caches using partial tag matching. Benefits include reduced power consumption and, in some cases, improved latency.

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CACHE POWER-SAVING TECHNIQUE USING PARTIAL TAG MATCHING

Disclosed is a method for reducing the power consumption of caches using partial tag matching. Benefits include reduced power consumption and, in some cases, improved latency.

General Description

The main activities in the cache can be separated into two different groups: Tag Array and Data Array operations. Both of those operation types consume power linear to the associativity of the cache. The disclosed method ends this dependence and reduces power consumption while maintaining performance.

The method separates the Tag Matching process into two phases. During the first phase, just few bits of the tags are matched. During the second phase, the regular access procedure is performed but previously unmatched ways are ignored both their tag match and data access operations. That is, ways failed in first phase matching, do not proceed to the long, power consuming tag compare and data retrieval operations.

The partial tag matching allows optimal tradeoff among cache performance, power, and simplicity of scheduling (due to its fixed latency).

The disclosed method represents a new algorithm for handling cache access that is optimized for power consumption but keeping high performance. This method may also be applied to any cache-like structures.

Conventional high performance caches access the tag and data in parallel. First, the tag array is accessed. Then, tag matching is processed while the data array is accessed for the entire set. If tag matching succeeds, the correlating data block is selected. If tag matching fails, higher-level memory is accessed. This process is fast, but consumes a lot of power it involves full tag matching of all tags and accessing all data ways in a set.

The serial cache lookup, which is optimized for power, operates as follows. First, the tag array is accessed. Then, tag matching is processed. If tag matching succeeds, the correlating data block is accessed. This approach prevents accessing the data array for the entire set and saves power. This process is slow, but is more power aware it involves full tag matching of all tags but accessing at most one data way in a set.

The Hot Way lookup algorithm works as follows. First, the tag array is accessed in parallel with access to the last recently used data block in the corresponding set. Next, a tag matching process is performed. If the data block selection is correct, the algorithm ends. If the data block selection is not correct, another access to the correct data block is performed. This algorithm saves power by accessing at most two data blocks instead the entire set. Most of the time, the disclosed method is faster in access time than serial cache. This process is faster than serial cache and consume less power than parallel cache, in most cases, it involves full tag matching of all tags but usually accessing one data way in...