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Design for a free-space package capacitance measurement tool for ESD

IP.com Disclosure Number: IPCOM000005127D
Publication Date: 2001-Aug-15
Document File: 3 page(s) / 16K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a design for hardware that effectively and accurately measures the package free-space capacitance for electrostatic discharge (ESD). Benefits include improved accuracy for capacitance measurements and decreased yield loss from ESD.

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Design for a free-space package capacitance measurement tool for ESD

Disclosed is a design for hardware that effectively and accurately measures the package free-space capacitance for electrostatic discharge (ESD). Benefits include improved accuracy for capacitance measurements and decreased yield loss from ESD.

Background

Most ESD requirements are stated as voltage. However, the most accurate tool for measuring the charge on an object is the Faraday cup that measures in Coulomb units. The user is required to translate the charge (Q) to voltage (V) by using the formula Q=C*V. To do the translation, the user must know the object's capacitance (C). Package capacitance varies for different form factors and package types. The disclosed design provides an accurate and easy way to measure capacitance.

Benefits

The disclosed design eliminates any external contact to the device/package before the charged device/package drops into the Faraday cup for measuring the charge on the device. With this contactless methodology, the free-space capacitance of the device/package can be accurately measured. This design is an improvement to the conventional method, where the charged device/package is transferred using tweezers, hand, or wire/string to drop the unit into the Faraday cup. This external contact could either reduce or induce charges onto the unit, resulting in inaccurate package capacitance measurement.

Description

The hardware fixture consists of two metal plates, a 55-mm bottom plate and a 25-mm top plate (see Figure 1). The bottom plate contains a connection to a high-voltage power supply for charging up the package/silicon. The top plate contains a banana plug socket (see Figure 2 for top views). The bottom plate is 3-mm thick, and the top plate is 5-mm thick (see Figure 3 for side views).

The top plate has a cavity of 20-mm square and 2-mm deep (see Figure 4 for the bottom view of the top plate). The cavity contains an insulator for the flip-chip package to avoid electrical shorts where the backside of the silicon is exposed (see Figure 5 for the FC-PGA package).

The hardware fixture is set up for measurement (see Figure 6) through the following procedure:

1. Connect the bottom and top plate to the power supply through the banana plug socket. On the bottom plate, connect to the +ve terminal at the power supply. On the top plate, connect to the

-ve terminal or GND at the power supply.

2. Place the device/package with the pin or ball touching the bottom plate.

3. Place the top plate onto the package body/substrate, but do not touch the silicon backside for FC-xGA packages to avoid direct electrical short at the silicon.

4. Carefully fit the top plate with the cavity into the silicon backside.

5. After fully charging up the device/package, drop it into a Faraday cup by separating the top and bottom plates. The device/package automatically drops down.

The free-space capacitance of the package is easily and accurately measured using this hardware and technique.

Insulator

5...