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Browse Prior Art Database

DIGITAL BIDIRECTIONAL BUS SWITCH

IP.com Disclosure Number: IPCOM000005533D
Original Publication Date: 1984-Apr-01
Included in the Prior Art Database: 2001-Oct-12
Document File: 2 page(s) / 63K

Publishing Venue

Motorola

Related People

Arnold J. Morales: AUTHOR

Abstract

This design solves the problem of emulating an MOS bidirectional bus switch in a TTL breadboard. Bidirectional bus switches are easily realized in MOS with couplers as follows: FIGURE 1 The "boot" signal, when asserted, simply connects lines B and A allowing the one line that is driven to "drive" the undriven line. That is, when "boot" is asserted, the coupler in effect becomes a low impedance resistor.

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Volume4 April 1984

DIGITAL BIDIRECTIONAL BUS SWITCH

by Arnold J. Morales

This design solves the problem of emulating an MOS bidirectional bus switch in a TTL breadboard.

Bidirectional bus switches are easily realized in MOS with couplers as follows:

FIGURE 1

   The "boot" signal, when asserted, simply connects lines B and A allowing the one line that is driven to "drive" the undriven line. That is, when "boot" is asserted, the coupler in effect becomes a low impedance resistor.

   Two types of commercially available logic gates, CMOS analog switches and linear analog switches, are too slow and offer a too high on resistance to be used on breadboards. The traditional solution to the problem has been to introduce logic into the breadboard to "predict" which direction data would be transferred on the bus and to control tristatable drivers using this logic.

However, this approach is cumbersome and compromises the breadboard design since logic is introduced which does not exist on the MOS being emulated. The following design solves this problem.

FIGURE 2

    "Eoot" is asserted to transfer data from one bus to the other. At that time, one bus will be driven (either high or low), and the other bus line will be undriven, but pulled up to the high state through a resistor. If at this time one of the bus lines is driven low, both lines will be pulled low by open collector NAND gates. This has the effect of reinforcing a low on the driven bus line, and pulling the undriven bus line l...