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A TECHNIQUE FOR VOICE DETECTION IN A PCM SPEAKERPHONE

IP.com Disclosure Number: IPCOM000005560D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2001-Oct-16
Document File: 2 page(s) / 77K

Publishing Venue

Motorola

Related People

David E. Bush: AUTHOR

Abstract

A voice detector architecture which operates directly on digitally encoded PCM data is shown in Figure 1. The PCM data, typically 8000 8-bit digital samples per second, enters the detector in either serial or parallel form. The first step is conversion from A-Law or p-Law code to conventional binary code. The sign bit is ignored, which effectively equates to full wave rectification of the signal. Fewer than the remaining seven bits may be used for processing in order to reduce the size of the circuitry. The architecture functions the same regardless of the number of most significant bits used, however, the performance of the detector will degrade as bits are eliminated.

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MOTOROLA Technical Developments Volume 5 October 1985

A TECHNIQUE FOR VOICE DETECTION IN A PCM SPEAKERPHONE

by David E. Bush

   A voice detector architecture which operates directly on digitally encoded PCM data is shown in Figure 1. The PCM data, typically 8000 8-bit digital samples per second, enters the detector in either serial or parallel form. The first step is conversion from A-Law or p-Law code to conventional binary code. The sign bit is ignored, which effectively equates to full wave rectification of the signal. Fewer than the remaining seven bits may be used for processing in order to reduce the size of the circuitry. The architecture functions the same regardless of the number of most significant bits used, however, the performance of the detector will degrade as bits are eliminated.

   The magnitude bits, M, go to two similar circuits, the Envelope Detector and the Adaptive Threshold Detector. Beginning with the Envelope Detector, M is compared to a feedback word, E, which is the smoothed envelope of M. If M is greater than E, then E is incremented. Otherwise, E is decremented. E is generated by an up/down counter which either increments or decrements depending on the outcome of the comparison between M and E. Notice, however, that the incrementing takes place from a bit position more significant than the LSB position and the decrementing is done from the LSB position. In this way, E will attack more rapidly than it will decay. In this example, E attac...