Browse Prior Art Database

FOUR-WIRE BUS FOR INSTRUMENT SELF-TEST

IP.com Disclosure Number: IPCOM000005579D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2001-Oct-17
Document File: 2 page(s) / 93K

Publishing Venue

Motorola

Related People

Paul Kasley: AUTHOR [+2]

Abstract

To improve instrument reliability and serviceability, an electronic instrument's internal microprocessor measuring system may also be used to monitor the internal condition of the instrument itself. While techniques such as CRC checks, watchdog timers, loopbacks, and various test algorithms can be employed to ensure proper operation of the microprocessor and its support logic, little methodology has been applied to the monitoring of the signal condi- tioning circuitry ahead of the analog-to-digital converter (ADC). In the past, test points have been included in designs for self-test, but generally there are too few to be truly indicative of the overall "health" of the system. The pro- posed 4-wire bus configuration of Figure 1 is a simple and economical test interface for gaining access to multiple test points within the analog sections of an instrument. When incorporated into the design of the product, the bus provides greatly improved self-test capability, and assists in factory test operations.

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MOTOROLA Technical Developments Volume 5 October 1985

FOUR-WIRE BUS FOR INSTRUMENT SELF-TEST

by Paul Kasley and Dan Lurey

   To improve instrument reliability and serviceability, an electronic instrument's internal microprocessor measuring system may also be used to monitor the internal condition of the instrument itself. While techniques such as CRC checks, watchdog timers, loopbacks, and various test algorithms can be employed to ensure proper operation of the microprocessor and its support logic, little methodology has been applied to the monitoring of the signal condi- tioning circuitry ahead of the analog-to-digital converter (ADC). In the past, test points have been included in designs for self-test, but generally there are too few to be truly indicative of the overall "health" of the system. The pro- posed 4-wire bus configuration of Figure 1 is a simple and economical test interface for gaining access to multiple test points within the analog sections of an instrument. When incorporated into the design of the product, the bus provides greatly improved self-test capability, and assists in factory test operations.

The bus consists of four signals that are routed from circuit to circuit throughout an instrument: (1) Common Voltage Bus (CVB) - a common signal path that is coupled by analog transmission gates to individual test points;
(2) Enable - a daisy chained signal used to enable the transmission gates in sequence; (3) Clock - a signal common to all latches (flip-flops) used to shift the enable signal down the chain; and (4) Reset-a signal common to all latches used to initialize them to a predetermined state (turn off all transmission gates). Digital and DC volt- age test points are connected directly to transmission gate inputs. RF and AC signals are converted to DC voltages by a sampling or detector network before they are applied to a transm...