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INTERRUPT STACK MECHANISM

IP.com Disclosure Number: IPCOM000005618D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-19
Document File: 1 page(s) / 88K

Publishing Venue

Motorola

Related People

Dave Mothersole: AUTHOR [+2]

Abstract

When exception processing occurs, information that is pushed onto memory stacks is normally associated with the interrupted process state. It is optimal for the operating system if this information is stacked into a storage area dedicated for information of that particular process, The original M68000 architecture does not allow for this since multiple exceptions can occur on the system stack. This publication deals with the improve- ment of the M68000 family architecture that was designed into the MC68020 implementation. This improvement allows process related exception information to be stacked only in the area of storage or stack corresponding to the interrupted process. This removes the M68000 requirement of copying data between system stack and process control blocks. Page fault (bus error) handling becomes much more efficient as a result.

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6x-l MOWROLA Technical Developments Volume 6

October 1986

INTERRUPT STACK MECHANISM

by Dave Mothersole and Dave Trissel

   When exception processing occurs, information that is pushed onto memory stacks is normally associated with the interrupted process state. It is optimal for the operating system if this information is stacked into a storage area dedicated for information of that particular process, The original M68000 architecture does not allow for this since multiple exceptions can occur on the system stack. This publication deals with the improve- ment of the M68000 family architecture that was designed into the MC68020 implementation. This improvement allows process related exception information to be stacked only in the area of storage or stack corresponding
to the interrupted process. This removes the M68000 requirement of copying data between system stack and process control blocks. Page fault (bus error) handling becomes much more efficient as a result.

   To better understand the mechanism, it is necessary to first understand basic exception handling (non-l/O related). The exception always involves the storing of process related data onto the system stack and the enter- ing of an exception routine for the interrupting process. If the exception handler itself takes an exception, then the same system stack is used and all process information is now resident on the same system stack. Thus the supervisor stack may be allocated within a Task Control Block, and is preserved across task switches.

   Now examine the case when an l/O related exception occurs. The data stacked is still associated with the process. However, since the I/O exception handler is not associated with the process, any exception that occurs in the l/O handler is associated with the system l/O and not the original process. Thus the MC68020 implements an additional stack called the interrupt stack which it switches to upon encountering an l/O inter- rupt. This allows all l/O activity to be associated with the l/O interrupt stack. The new stack mechanism is shown in Fig. 1.

user stack master system stack interrupt stack

Figure 1 - MC68020 Stack Format

   The MC68020 implements these concepts...