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A HIGH YIELD PROCESS FOR DELICATE WAFERS

IP.com Disclosure Number: IPCOM000005625D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-22
Document File: 2 page(s) / 108K

Publishing Venue

Motorola

Related People

Neal Mellen: AUTHOR [+2]

Abstract

The processing of thin or delicate wafers is often hampered by excessive wafer breakage during the fabrica- tion process resulting in greatly reduced yields. This is especially true for optoelectronic device wafers of InP and GaAs because they are both fragile and thin (.002" - .OOW'). The process presented here minimizes the break- age of wafers during the fabrication process by utilizing a two wax bonding scheme where the wafer is attached to the submount using a high melting point wax which permits further attachment to the lapping and polishing fixtures with a lower melting point wax so that the wafer does not need to be removed from the submount. The melting point of the high temperature wax is sufficiently high so that the temperature cycles used in nor- mal photoresist processing are not an issue at the later steps in the process. The submount provides the mechan- ical support necessary for the wafer during the high breakage steps (i.e. lapping, polishing, alignment, etc.).

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m MOlYlROLA Technical Developments October 1986

A HIGH YIELD PROCESS FOR DELICATE WAFERS

by Neal Mellen and Diana Convey

   The processing of thin or delicate wafers is often hampered by excessive wafer breakage during the fabrica- tion process resulting in greatly reduced yields. This is especially true for optoelectronic device wafers of InP and GaAs because they are both fragile and thin (.002" - .OOW'). The process presented here minimizes the break- age of wafers during the fabrication process by utilizing a two wax bonding scheme where the wafer is attached to the submount using a high melting point wax which permits further attachment to the lapping and polishing fixtures with a lower melting point wax so that the wafer does not need to be removed from the submount. The melting point of the high temperature wax is sufficiently high so that the temperature cycles used in nor- mal photoresist processing are not an issue at the later steps in the process. The submount provides the mechan- ical support necessary for the wafer during the high breakage steps (i.e. lapping, polishing, alignment, etc.).

   The process for an InGaAsP surface emitting LED wafer is shown schematically in Figure 1, but the pro- cess in general may be applied to any thin or delicate wafer process. Steps 1-5 are typical for this device. A dielectric is deposited and then defined. Steps 6 and 7 are performed to define a grid pattern from which a front-to-back alignment may be performed. The p-metal is then deposited and another photoresist step, still to maintain the grid pattern, is done. The heatsink is then selectively plated in the areas defined by the photoresist and the p-metal is subsequently lifted off. At this point an anneal of the contact is usually performed. All of the processing on the p-side of the wafer is now complete.

   The next step is to mount the wafer to a submount, in this case a silicon wafer, using a high melting temperature ( N 150°C) wax. This wafer-submount bond is retained until the entire wafer process has been com- pleted. It is the mechanical rigidity of the submount which minimizes wafer breakage during the remainder of the process. The submount is now mounted to the...