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DUAL AMPLIFIER HIGH RESOLUTION CMOS SENSING

IP.com Disclosure Number: IPCOM000005628D
Original Publication Date: 1987-Oct-01
Included in the Prior Art Database: 2001-Oct-22
Document File: 2 page(s) / 77K

Publishing Venue

Motorola

Related People

Ruey J. Yu: AUTHOR [+2]

Abstract

In NMOS DRAM's almost every column sense amplifier circuit which senses and then amplifies voltage difference across pair of bit lines employs dual timing scheme. That is, referring to Figure 1, a slow pull-down on Qss which serves as signal sensing, followed by a strong pull-down on Qsf which serves as signal amplifica- tion. This is justified by the fact that, to the first order, the tolerable imbalances in transistor gain of the cross- latching pair is not only affected by the initial signal strength, but also the voltage level of the common pull- down node, vso. The higher this common node voltage, the more tolerance in imbalances of the transistor gain is allowed.

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MOlYlROLA Technical Developments Volume 7 October 1987

DUAL AMPLIFIER HIGH RESOLUTION CMOS SENSING

by Ruey J. Yu and Perry H. Pelley

   In NMOS DRAM's almost every column sense amplifier circuit which senses and then amplifies voltage difference across pair of bit lines employs dual timing scheme. That is, referring to Figure 1, a slow pull-down on Qss which serves as signal sensing, followed by a strong pull-down on Qsf which serves as signal amplifica- tion. This is justified by the fact that, to the first order, the tolerable imbalances in transistor gain of the cross- latching pair is not only affected by the initial signal strength, but also the voltage level of the common pull- down node, vso. The higher this common node voltage, the more tolerance in imbalances of the transistor gain is allowed.

   This dual timing scheme of the sense amplifier has been carried over to the CMOS DRAM circuits. This is not an optimum solution. Due to the unique feature of the complementary function of the p pull-up and n pull-down transistors, (referring to Figure 2) that sensing and amplification should NOT be treated as two sep- arated activities. By activating both Qtt & Qss simultaneously, correct sensing and amplification can be accom- plished with shorter time delay and less initial signal strength as depicted on Figure 3.

Also from Figures 1 & 2, the net difference in current flowing out of nodes BL and BLB is

(I + Is - le) - I = Is - le for n-pair only (1)

and

((I + Is...