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Method for reversible fusing of microprocessor identifiers

IP.com Disclosure Number: IPCOM000005646D
Publication Date: 2001-Oct-23
Document File: 3 page(s) / 47K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for reversible fusing of microprocessor identifiers. Benefits include increased test flexibility, increased ease in encoding chips for product certification, and increased efficiency in product planning.

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Method for reversible fusing of microprocessor identifiers

Disclosed is a method for reversible fusing of microprocessor identifiers. Benefits include increased test flexibility, increased ease in encoding chips for product certification, and increased efficiency in product planning.

Background

              Recent generations of consumer oriented microprocessors have seen a rapid increase in the various product segments that one basic chip must accommodate. Although previous microprocessors could satisfy market needs by simply having mobile and desktop versions at one or two frequencies, current offerings have multiple mobile segments (such as performance, mobility, and ultra‐mobility), multiple desktop segments (such as different cache sizes), and a server segment. In addition, all of these groupings have multiple frequency versions. This complexity results in a large number of test conditions because each product segment can have its own usage specifications. While a given chip usually satisfies the requirements of many (or even all) of the possible product segments, after it is tested, packaged, and fused, it must be sold into a certain segment even if demand in that segment has lessened while the chip underwent assembly and test. This leads to inefficiencies in product planning and lost revenue as the manufacturer may struggle to meet certain market commitments while experiencing inventory surpluses for other similar (but not similar enough) products.

Description

              The disclosed method addresses the problems associated with irreversible fusing of microprocessor identifiers. When a chip is found to pass a given set of test conditions, a decision must be made as to which segment it should be fused. When this decision is made, a fuse‐write step selectively and irreversibly blows interconnections in the chip permanently identifying it as a certain part intended to operate at a certain frequency. This decision is made easier if the part is at the high end of the frequency range. Because relatively few chips pass at the top frequency bin, it makes sense to bin the part as a high performance device. The decision is also facilitated if the part is a slow performer. In that case, fewer segments are likely to be available. However, for the majority of chips, those in the middle of the performance distribution, many different identifiers could be selected. Ultimately, the decision for these chips should be the bin that maximizes revenue and minimizes inventory surplus.

              Forecasting market conditions is extremely difficult and  chances for optimization are improved if the fusing can happen as close to final sale as possible and/or if changes can be made to inventory which exceeds the demands of a given segment. The situation is improved if rather than irreversible encoding of chip identifiers, the manufacturer exploits a reversible but still non‐volatile method. The disclosed method includes two techniques for accomplishing this encoding.

              The first technique (see Fig...