Browse Prior Art Database

LOCK INDICATOR CIRCUIT

IP.com Disclosure Number: IPCOM000006191D
Original Publication Date: 1991-Jul-01
Included in the Prior Art Database: 2001-Dec-12
Document File: 2 page(s) / 67K

Publishing Venue

Motorola

Related People

Wayne Shepherd: AUTHOR

Abstract

Once the lock range of a phase detector is exceeded, an A-C signal equal to the difference fre- quency is generated. A counter can be used to count the A-C signal which generates an output (unlock) once a specific value has been reached.

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MOTOROLA INC. Technical Developments Volume 13 July 1991

LOCK INDICATOR CIRCUIT

by Wayne Shepherd

  Once the lock range of a phase detector is exceeded, an A-C signal equal to the difference fre- quency is generated. A counter can be used to count the A-C signal which generates an output (unlock) once a specific value has been reached.

  The Lock Indicator Circuit consists of two coun- ters, reset logic circuitry and an output buffer. Inputs are FREF, LOCKX and ADAPT. The output (LOCK) logic is a "0" for the unlock case and a "1" for the lock case. FREF is the phase detector reference frequency. LOCKX is the difference frequency as determined by the phase detector logic disclosed in patent #4959617. ADAPT is an output from a time initialized by the CEX of the programmable serial shift register. ADAPT in turn initializes the Lock Indicator Circuit.

  After initialization, counter A toggles with respect to LOCKX. Counter B toggles with respect to FREF and generates a reset for counter A. If counter A tog- gles through to the output (unlock) before counter B generates a reset pulse, the reset pulse is disabled from counter A. Counter A will stay in the unlock mode until it is cleared by ADAPT. If the reset pulse occurs before the output can be changed, counter A is reset and the output (LOCK) remains in the lock mode. The result is a pulsed check of lock status. This was done to eliminate continuous accumulation in counter A due to random transients in the system (mic...