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HIGH TEMPERATURE THERMOPLASTIC SUBSTRATE HAVING A VACUUM DEPOSITED SOLDERABLE ELECTRICAL CONDUCTOR

IP.com Disclosure Number: IPCOM000006233D
Original Publication Date: 1991-Jul-01
Included in the Prior Art Database: 2001-Dec-17
Document File: 2 page(s) / 110K

Publishing Venue

Motorola

Related People

Dale W. Dorinski: AUTHOR [+3]

Abstract

There are a number of thermoplastic materials that can be molded or otherwise formed into shapes for printed circuit substrates. To be a suitable material for a printed circuit substrate, the material must be able to withstand soldering temperatures. High tem- perature thermoplastic materials that meet this require- ment have a heat deflection temperature of 170°C or greater, for example, polyetherimide (PEI), polysul- fone, polyethersulfone, polyamideimide, polyarylsul- fone, polyarylate, polyetheretherketone, poly- butyleneterephthalate, and blended combinations of these.

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MOTOROLA INC. Technical Developments Volume 13 July 1991

HIGH TEMPERATURE THERMOPLASTIC SUBSTRATE HAVING A VACUUM DEPOSITED SOLDERABLE ELECTRICAL CONDUCTOR

by Dale W. Dorinski, Glenn F. Urbish and Anthony B. Suppelsa

BACKGROUND

  There are a number of thermoplastic materials that can be molded or otherwise formed into shapes for printed circuit substrates. To be a suitable material for a printed circuit substrate, the material must be able to withstand soldering temperatures. High tem- perature thermoplastic materials that meet this require- ment have a heat deflection temperature of 170°C or greater, for example, polyetherimide (PEI), polysul- fone, polyethersulfone, polyamideimide, polyarylsul- fone, polyarylate, polyetheretherketone, poly- butyleneterephthalate, and blended combinations of these.

  There are two basic methods that have been used to affix an electrical circuit pattern to the surface of these substrates, the foil bonding method and the plat- ing method. Unfortunately, there are disadvantages to both methods. In the foil bonding method, the surface of the substrate must be flat and through-hole connec- tions from one side of the substrate to the other cannot be formed. In the electroless plating method, the pri- mary disadvantage is the time required to plate-up an electrical circuit pattern of usable thickness.

  Vacuum deposition of conductive materials has been previously used to form electrical circuit patterns on high temperature thermoplastics. For example, dichroic materials have been vacuum deposited over PEI to form reflectors for surgical lamps. Since vac- uum deposition lacks the disadvantages of the foil bonding and plating processes, it appears to be ideal for affixing solderable electrical circuit patterns to the surface of high temperature thermoplastic substrates. Unfortunately, when solderable materials are vacuum deposited onto unprepared high temperature thermo- plastic substrates, the bond strength between the sub- strate and the solderable layer is so low that the vac- uum deposited material simply peels away from the surface of the substrate when the substrate is exposed to soldering temperatures.

0 Motorola. Inc. 1991

DESCRIPTION

  The process for vacuum depositing a solderable electrical conductor onto the surface of a high temper- ature thermoplastic substrate consists of creating a reactive surface suitable for bonding a solderable elec- trical conductor to the substrate. Then, a solderable electrical conductor is vacuum deposited onto the reactive surface of the substrate.

  The substrate is first cleaned in a detergent solu- tion such as Alkanox,'" and rinsed in dionized water, dried at...