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NEW TECHNIQUE REDUCES VOLTAGE AND CURRENT MEASUREMENT ERROR AND MEASUREMENT TIME

IP.com Disclosure Number: IPCOM000006354D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2001-Dec-27
Document File: 2 page(s) / 99K

Publishing Venue

Motorola

Related People

Chuck Jaris: AUTHOR [+4]

Abstract

The following explains an improved test method used for Motorola's MasterTech Circuit Analyzer. MasterTech tests the current and voltage response of a circuit node in an unpowered state. These "signatures" are sent to a host personal computer wbicb compares the measured signa- ture to the stored signature of a known good circuit node. In this manner, technicians are able to identify "defective" nodes and locate the responsible components. The sig- nature is nothing more than the voltage versus current response of the node to a fixd Frequency, fixed amplitude, current limited sinusoidal waveform.

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MOTOROLA INC. Technical Developments Volume 14 December 1991

NEW TECHNIQUE REDUCES VOLTAGE AND CURRENT MEASUREMENT ERROR AND MEASUREMENT TIME

by Chuck Jaris, Patrick Bomya, Stan Zydek and Scott Swisher

ABSTRACT

  The following explains an improved test method used for Motorola's MasterTech Circuit Analyzer. MasterTech tests the current and voltage response of a circuit node in an unpowered state. These "signatures" are sent to a host personal computer wbicb compares the measured signa- ture to the stored signature of a known good circuit node. In this manner, technicians are able to identify "defective" nodes and locate the responsible components. The sig- nature is nothing more than the voltage versus current response of the node to a fixd Frequency, fixed amplitude, current limited sinusoidal waveform.

BASIC CIRCUIT DESCRIPTION

  The sinusoidal waveform is generated from a digital look-up table and a digital-to-analog converter. The out- put stage consists of a power op-amp in a unity-gain follower mode and four selectable current-limiting resis- tors, as shown below in Figure 1. Output current is meas- ured across the current limiting resistors by an op-amp subtractor circuit. An analog-to-digital converter trans- forms the output voltage and output current into digital bytes. The same clock used by the digital-to-analog con- verter to generate the sinusoidal data points is also used

by the analog-to-digital converter to measure the output waveforms. Therefore, each measured data point corre- sponds exactly to a unique data point on the sinusoidal waveform. Furthermore, the system is callibrated such that the digital byte used by the digital-to-analog converter to generate an analog voltage point on the sinusoid will be identical in value to that byte generated by the analog-to- digital converter measuring that analog voltage point. There are two limitations of this current design. First, two measurements are made to generate a signature, a voltage measurement and a current measurement. The voltage measurements are made across the node under test. The current measurements are made by measuring the voltage across the current limiting resistor...