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BUILT IN ANALOG TESTABILITY

IP.com Disclosure Number: IPCOM000006396D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2001-Dec-31
Document File: 1 page(s) / 59K

Publishing Venue

Motorola

Related People

Behrooz Abdi: AUTHOR

Abstract

While built in testability is common place in digital integrated circuits, this issue has not been explored in the analog arena. In the case of analog VLSI circuits valuable test time is lost before it is determined that the device has failed the test. The more complex the device, the more di&ult it is to characterize the failure and its location in the signal path. To circumvent this problem analog designers use probe pads to monitor critical bias voltages/currents and even signals at probe, before mak- ing AC measurements in order to screen out defective devices in a shorter time. This method however, has several disadvantages: a. Extra silicon is needed for probe pads and cir- cuits to drive the test probe b. Drive circuitry dissipates too much power c. The increase in probe pads also reduces test relia- bility because of additional circuitry and probe needles.

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MOTOROLA INC. Technical Developments Volume 15 May 1992

BUILT IN ANALOG TESTABILITY

by Behrooz Abdi

  While built in testability is common place in digital integrated circuits, this issue has not been explored in the analog arena. In the case of analog VLSI circuits valuable test time is lost before it is determined that the device has failed the test. The more complex the device, the more di&ult it is to characterize the failure and its location in the signal path. To circumvent this problem analog designers use probe pads to monitor critical bias voltages/currents and even signals at probe, before mak- ing AC measurements in order to screen out defective devices in a shorter time. This method however, has several disadvantages:

a. Extra silicon is needed for probe pads and cir- cuits to drive the test probe

b. Drive circuitry dissipates too much power

c. The increase in probe pads also reduces test relia- bility because of additional circuitry and probe needles.

can customize specs such as gain and filter frequency for their particular application. This new feature can also be utilized to improve device testability using the on chip interface logic. Critical bias lines and other internal signals are fed into a probe pad (or an external pad/pin if avail- able) through an analog multiplexer/driver. This N-input multiplexer is addressed by the logic interface circuitry in order to select the desired output to the test pad. The MUX/driver combination can also be...