Browse Prior Art Database

ADAPTIVE CLOCK SPEED CONTROL FOR VARIABLE PROCESSOR LOADING

IP.com Disclosure Number: IPCOM000006402D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2001-Dec-31
Document File: 2 page(s) / 87K

Publishing Venue

Motorola

Related People

Richard Young: AUTHOR [+3]

Abstract

The invention is a method of reducing the average current drain, thereby increasing the operation time between recharging, of portable (multi)processor elec- tronic equipment which is battery or solar powered. It has been shown that the current drain of a processor is directly proportional to the bus operating frequency of the part. Using this information, current drain reduction is accomplished by operating the processors) at the lowest possible clock oscillator speed at all times. This method can be applied to real-time and batch processing systems. In either system the processor gives each active task a portion of the total processor time to execute its task. If all tasks are completed the remaining idle time is wasted in a loop or a wait operation running at the maximum clock speed.

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MOTOROLA INC. Technical Developments Volume 15 May 1992

ADAPTIVE CLOCK SPEED CONTROL FOR VARIABLE PROCESSOR LOADING

by Richard Young, Chin Pan Wong & Shawn Warner

  The invention is a method of reducing the average current drain, thereby increasing the operation time between recharging, of portable (multi)processor elec- tronic equipment which is battery or solar powered. It has been shown that the current drain of a processor is directly proportional to the bus operating frequency of the part. Using this information, current drain reduction is accomplished by operating the processors) at the lowest possible clock oscillator speed at all times. This method can be applied to real-time and batch processing systems. In either system the processor gives each active task a portion of the total processor time to execute its task. If all tasks are completed the remaining idle time is wasted in a loop or a wait operation running at the maximum clock speed.

To eliminate this waste of processor time and bat- tery power, a method of calculating the required proces-

SOT power (sometimes calculated in MIPS) and then translating this into the miniium clock oscillator fre- quency required to meet system constraints. This allows the processor to run at the lower, energy efficient rate.

  The method is implemented by assigning a "power index" to each active task in the processor. A clock con- trol routine is run when a task is activated or deactivated to recalculate the required processor clock frequency. The "power index" is a number which indicates the per- centage of the processor required to complete the task when it is operating at the maximum clock frequency. The minimum cloc...