Browse Prior Art Database

A VARIABLE BANDWIDTH LOW PASS FILTER IMPLEMENTED ON THE B15K TRANSISTOR ARRAY

IP.com Disclosure Number: IPCOM000006419D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2002-Jan-02
Document File: 2 page(s) / 106K

Publishing Venue

Motorola

Related People

Richard H. Ong: AUTHOR

Abstract

A Variable Bandwidth Lowpass Filter (VLPF) dis- an identical differential paii of transistors 3, 5, a lower crete design using pnp devices has been used as a pair of differential transistdrs 11, 12 and 14, 15, current baseband data iilter in several multi-rate demodulators source transistors 16, 17, 18 with resistors 19,20, 21, an at Motorola, e.g., a matched filter for variable rate QPSK output emitter follower trinsistor 10, and an external detection. Some limitations of the discrete design are capacitor 9, selected for a~ particular frequency range. limited bandwidth, large DC offset voltages, and poor All differential pairs have degeneration resistors 4,7,13 amplitude linearity. An all npn single chip solution ver- in between the emitters tom; provide an extended linear sus a discrete version using pnp devices has been operation range. Lower differential transistor pair 14,15 developed which reduces size, weight and power con- is used to control how m&h of the 10 milliip con- sumption while improving bandwidth, DC offset volt- stant current is steered th&gh input differential tran- ages, phase linearity, amplitude linearity (as measured sistor pair 6, 8. Control input VCN may be swept from by the 1dB and 3rd order intercept points), transient -0.3 V to -3.0 V to control'this current. Reference volt- response, noise figure and response to temperature var- age VREF or threshold (abproximately -1.8 V) for the iations. In summary, the all npn single chip design has a VCN signal is generated b) voltage reference 22. The maximum 3 dB bandwidth of over 500 MegaHertz (com- other upper differential transistor pair 3,5 provides what- pared to 300 MegaHertz for the discrete version), DC ever current is not steered td, input pair 6,s to be summed offset voltages of less than 1 millivolt over the full tuning at the collectors thereof. Tl!is allows a constant amount and temperature range (compared to 4 millivolts for the of current through resistors 1,2 so that a constant DC discrete version), and improved output signal integrity output voltage is achieved.~,The B15K Transistor Array with a total harmonic distortion figure of less than 0.1% has bandgap reference voltage generator 23 to provide (compared to 1.6% for the discrete version). Also, three temperature and supply voltage variation compensation. stages of a VLPF configuration on a single 59x79 mil die Bandgap reference voltage 'kenerator 23 provides refer- may be packaged in a small footprint 20 lead chip carrier. ence voltage VCS for currep sources 16,17,X The one-stage VLPF (Figure 1) is a wideband oper- ational amplifier with a unity closed-loop DC gain and filter capacitor 9 placed between the single-ended out- put (collector of transistor 8) of differential amplifier 6, 8 and op-amp output OUT The signal is processed as in a single-pole RC lowpass filter with a voltage- or current-variable resistance value implemented by chang- ing the emitter bias current of differential amplifier transistor 6, 8. The faltering action is a result of the slew rate limit of external capacitor 9 which is charged and discharge by a current source provided by the differential amplifier.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 50% of the total text.

Page 1 of 2

0 A4

MOTOROLA INC. Technical Developments \iolume 15 May 1992

A VARIABLE BANDWIDTH LOW PASS FILTER IMFLEMENTED

ON THE B15K TRANSISTOR ARRA4,

by Richard H. Ong

   A Variable Bandwidth Lowpass Filter (VLPF) dis- an identical differential paii of transistors 3, 5, a lower crete design using pnp devices has been used as a pair of differential transistdrs 11, 12 and 14, 15, current baseband data iilter in several multi-rate demodulators source transistors 16, 17, 18 with resistors 19,20, 21, an at Motorola, e.g., a matched filter for variable rate QPSK output emitter follower trinsistor 10, and an external detection. Some limitations of the discrete design are capacitor 9, selected for a~ particular frequency range. limited bandwidth, large DC offset voltages, and poor All differential pairs have degeneration resistors 4,7,13 amplitude linearity. An all npn single chip solution ver- in between the emitters tom; provide an extended linear sus a discrete version using pnp devices has been operation range. Lower differential transistor pair 14,15 developed which reduces size, weight and power con- is used to control how m&h of the 10 milliip con- sumption while improving bandwidth, DC offset volt- stant current is steered th&gh input differential tran- ages, phase linearity, amplitude linearity (as measured sistor pair 6, 8. Control input VCN may be swept from by the 1dB and 3rd order intercept points), transient -0.3 V to -3.0 V to control'this current. Reference volt- response, noise figure and response to temperature var- age VREF or threshold (abproximately -1.8 V) for the iations. In summary, the all npn single chip design has a VCN signal is generated b) voltage reference 22. The maximum 3 dB bandwidth of over 500 MegaHertz (com- other upper differential transistor pair 3,5 provides what- pared to 300 MegaHertz for the discrete version), DC ever current is not steered td, input pair 6,s to be summed offset voltages of less than 1 millivolt over the full tuning at the collectors thereof. Tl!is allows a constant amount and temperature range (compared to 4 millivolts for the of current through resistors 1,2 so that a constant DC discrete version), and improved output signal integrity output voltage is achieved...