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A Nitride-Oxide Blocking Layer For Scaled SONOS Non-Volatile Memory

IP.com Disclosure Number: IPCOM000006506D
Original Publication Date: 2002-Jan-11
Included in the Prior Art Database: 2002-Jan-11
Document File: 3 page(s) / 67K

Publishing Venue

Motorola

Related People

Craig Cavins: AUTHOR [+2]

Abstract

SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) and similar thin film storage non-volatile memory has been studied for greater than thirty years in the semiconductor industry1. Recently interest in SONOS has intensified due to the process simplicity, reduction of program/erase voltages, and scaling advantages. A limitation in scaling the thickness of the top (blocking) oxide of the dielectric stack is the need to prevent tunneling of electrons from the polysilicon gate to the nitride or oxynitride charge storage layer during the cell operation. This paper describes the use of a nitride-oxide blocking dielectric in order to further prevent tunneling from the gate while allowing additional scaling of the effective thickness.

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A Nitride-Oxide Blocking Layer For Scaled SONOS Non-Volatile Memory

by Craig Cavins and Ko-Min Chang

Abstract.  SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) and similar thin film storage non-volatile memory has been studied for greater than thirty years in the semiconductor industry1.  Recently interest in SONOS has intensified due to the process simplicity, reduction of program/erase voltages, and scaling advantages.  A limitation in scaling the thickness of the top (blocking) oxide of the dielectric stack is the need to prevent tunneling of electrons from the polysilicon gate to the nitride or oxynitride charge storage layer during the cell operation.  This paper describes the use of a nitride-oxide blocking dielectric in order to further prevent tunneling from the gate while allowing additional scaling of the effective thickness.

Body.  A typical SONOS non-volatile memory cell structure is shown in Figure 1.  The SONOS transistor belongs to a class of memory cells that use charge storage in a non-conductive layer (typically silicon nitride or silicon oxynitride, but other films capable of trapping charges can be used) to determine the memory state.  Although many methods of program and erase exist, one method uses vertical fields to tunnel electrons between the storage dielectric and the source, drain, or well of the device.  As vertical fields are applied, it is generally undesirable to allow charge transfer through the blocking dielectric.  The most obvious way to prevent charge transfer through the blocking dielectric is to thicken the film, however this technique is contrary to the desire to vertically scale the device in order to facilitate scaling of the operating voltages.

Figure 1. Typical scaled SONOS non-volatile memory cell structure.

To elaborate on the purpose of the blocking dielectric, assume that the erase operation uses low (negative) gate voltage relative to the source, drain, or well region.  The erase operation in this case is intended to result in greater net positive charge in the storage layer as electrons move from the storage layer to the source, drain, or well or holes are injected to the storage layer from the source, drain, or well.  The applied vertical field can also ha...