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Optimum GSM/EDGE Receiving by means of Dual A-to-D Converters

IP.com Disclosure Number: IPCOM000006537D
Original Publication Date: 2002-Jan-11
Included in the Prior Art Database: 2002-Jan-11
Document File: 4 page(s) / 51K

Publishing Venue

Motorola

Related People

Nadim Khlat: AUTHOR [+2]

Abstract

In Digital Very Low IF (DVLIF) or Direct Conversion Receivers (DCR) most of the channel selectivity is done digitally and the analog filters only achieve some very limited selectivity. Therefore, in GSM or EDGE applications, a mix of wanted, adjacent and alternate channels hits the A-to-D converter. The absolute level of the wanted channel and the relative level of the interferers determine the receive conditions. In such applications, using TDMA/FDMA with frequency hoppings, these conditions may be different for each new receive slot. Moreover, it is not possible to do an AGC measurement and to perform a gain change of the amplifiers in front of the Ato-D converters (ADCs) during an active slot. This means that most of the time, either the ADCs saturate or the full ADC dynamic range is not used. In both cases, the receiving performance is degraded. The solution consists in using a pair of amplifier/ADC stages instead of a single stage for each of the received signal components. In each pair, one amplifier/ADC stage is used to handle a wanted channel signal at sensitivity level. The other amplifier/ADC stage is set to handle a wanted channel signal in presence of adjacent or alternate interferers. Both stages operate simultaneously at the begining of an active receive burst. If the stage dedicated to wanted signal at sensitivity level is not overloaded, then, this path is selected for further digital processing. Otherwise the output of the other stage is selected. Thus, the selection happens during the burst ramp-up period of 10ms prior to the active data pattern, based upon an overload detection done at the ADC output along the sensitivity path. The fast selection of the optimum gain setting in the receiver allows to immediately adapt to the receive conditions and so, to improve the receiving performance.

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Optimum GSM/EDGE Receiving

by means of Dual A-to-D Converters

by Nadim Khlat and Patrick Clément

 

ABSTRACT

In Digital Very Low IF (DVLIF) or Direct Conversion Receivers (DCR) most of the channel selectivity is done digitally and the analog filters only achieve some very limited  selectivity. Therefore, in GSM or EDGE applications, a mix of wanted, adjacent and alternate channels hits the A-to-D converter. The absolute level of the wanted channel and the relative level of the interferers determine the receive conditions. In such applications, using TDMA/FDMA  with frequency hoppings, these conditions may be different for each new receive slot. Moreover, it is not possible to do an AGC measurement and to perform a gain change of the amplifiers in front of the A–to-D converters (ADCs) during an active slot. This means that most of the time, either the ADCs saturate or the full ADC dynamic range is not used. In both cases, the receiving performance is degraded.

The solution consists in using a pair of amplifier/ADC stages instead of a single stage for each of the received signal components. In each pair, one amplifier/ADC stage is used to handle a wanted channel signal at sensitivity level. The other amplifier/ADC stage is set to handle a wanted channel signal in presence of adjacent or alternate interferers. Both stages operate simultaneously at the begining of an active receive burst. If the stage dedicated to wanted signal at sensitivity level is not overloaded, then, this path is selected for further digital processing. Otherwise the output of the other stage is selected. Thus, the selection happens during the burst ramp-up period of 10ms prior to the active data pattern, based upon an overload detection done at the ADC output along the sensitivity path.

The fast selection of the optimum gain setting in the receiver allows to immediately adapt to the receive conditions and so, to improve the receiving performance.

PROBLEM

In Digital Very Low IF (DVLIF) or Direct Conversion Receivers (DCR) most of the channel selectivity is done digitally and the analog filters only achieve some very limited  selectivity. In GSM/EDGE applications, among all the possible receive conditions, two main cases may be considered:

-         The received signal is a very low level wanted channel signal, at so-called sensitivity level, which requires to set the receive gain to the maximum value  in front of the A-to-D converters (ADCs) to minimize the overall noise figure.

-         The received signal is a medium level wanted channel signal, typically at -82dBm , with the presence of adjacent and alternate interferers that can be 41dB above the wanted channel. This requires an Automatic Gain Control (AGC) loop to reduce the gain in front of the ADCs to a lower value to avoid saturating the ADCs.

Unfortunately the GSM/EDGE systems are TDMA/FDMA systems with frequency hoppings. This changes the receive conditions for each new receive slot. Moreover, it is not possible to do an AGC measuremen...