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I2C Slave To Remote Parallel Bus Master

IP.com Disclosure Number: IPCOM000006592D
Publication Date: 2002-Jan-16
Document File: 3 page(s) / 24K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a design which implements an inter integrated circuit bus (I2C) slave device with an external memory bus interface. The assembly consists of the I2C interface, address and data bus, and the control lines necessary to enable reads and writes to the bus. Th interface attaches to a micro controller parallel bus, emulating an I2C master device.

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I2C Slave To Remote Parallel Bus Master

Disclosed is a design which implements an inter integrated circuit bus (I2C) slave device with an external memory bus interface. The assembly consists of the I2C interface, address and data bus, and the control lines necessary to enable reads and writes to the bus. Th interface attaches to a micro controller parallel bus, emulating an I2C master device.   

Today there are commercially available devices that can be attached to a micro-controller parallel bus and act as an I2C master device, and there are devices that are I2C slaves that have a single byte of generic I/O. However if a design requires more than eight bits accessible via I2C, it will get expensive to keep adding another device for every eight bits, and there are only eight unique address for that device, so a single bus can only support up to sixty four bits total.

This disclosed design solves the bit limitation by implementing an address buss that allows the user to select different bytes by specifying an address. This allows the users to attach to an I2C bus any device that was designed to interface directly to a micro-controller. This makes an enormous number of electronics devices accessible by a common three-wire interface. When used with the I2C master device mentioned earlier, this invention allows the creation of a remote parallel bus with an I2C interface.

The disclosed design is an I2C slave device with a data bus interface.  An I2C master can write addresses and read or write data from them. This device will look very must like an I2C electrical erasable programmable read-only memory (EEPROM) but the da...