Browse Prior Art Database

A PLANAR POLYSILICON RESISTOR PROCESS FOR ICs

IP.com Disclosure Number: IPCOM000006945D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2002-Feb-11
Document File: 2 page(s) / 141K

Publishing Venue

Motorola

Related People

Thomas Baker: AUTHOR [+2]

Abstract

Typically, to produce polysilicon thin tilm resistors for integrated circuits, polysilicon is deposited on the wafer surface and doped by ion implantation. The polysilicon is then patterned using photoresist and RIE etched to define the shape of the resistor. The resistor values are controlled by the cross-sectional area, resis- tivity and length of the polysilicon. The polysilicon is highly doped before etching to yield resistors with typi- cal values of 200-4000 Q.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 46% of the total text.

Page 1 of 2

MOTOROLA INC. Technical Developments Volume 19 June 1993

A PLANAR POLYSILICON RESISTOR PROCESS FOR ICs

by Thomas Baker and Bernie Boland

   Typically, to produce polysilicon thin tilm resistors for integrated circuits, polysilicon is deposited on the wafer surface and doped by ion implantation. The polysilicon is then patterned using photoresist and RIE etched to define the shape of the resistor. The resistor values are controlled by the cross-sectional area, resis- tivity and length of the polysilicon. The polysilicon is highly doped before etching to yield resistors with typi- cal values of 200-4000 Q.

  Although this conventional polysilicon resistor proc- ess yields very accurate value resistors, there can be a problem with the step coverage of metal over the polysilicon due to the polysilicon etch process. Vtia- tions in plasma etching of the poly affect the angle of the poly edges, which result in a potential for field failures of circuits ifthe overlying barrier metal fails.

  In addition to the step coverage problem, polysilicon is not easily used to fabricate low value resistors due to the metal step coverage problems resulting from using a thicker poly film. As a result, nichrome is typically used to build low value resistors. The use of nichrome pres- ents a second source of problems in building resistors for integrated circuits. Nichrome deposition, which con- trols the thickness of the tihn, and nichrome etching, which controls the width, are typically not as well con- trolled as poly deposition and etching. These variations in the dimensions of the resistor result in undesirable variations in resistor values.

  Based on the problems seen with the resistors made with polysilicon and nichrome, it is desirable to develop a process that will address these problems. It is also desirable to have a single process for producing resis- tors with a wide range of values that is both accurate and uses little chip area. By combiiing the accuracy of polysilicon with the low value resistors possible with nichrome, a new process offers a sign&ant advantage over the prior processes.

A new method of fabric&ing polysilicon resistors, the planar polysilicon resistor, has been developed as a

104

solution to the problems presented. The process is illus- trated in Figure 1. Fist, the oxide surface of the wafer is patterned with photo resist and etched in a conventional manner. This oxide is typically 2 pm thick in the field regions. Polysilicon is then deposited on the wafer to a sticient thickness to completely backtill the oxide cut and cover the surface. The surface of the wafer is then mechanically and chemically polished down through the polysilicon, stopping on the oxide. This forms a planar surface with the polysilicon resistor embedded in the oxide. The polysilicon resistor is then doped by ion implantation and annealed.

  Resistors were fabricated by intergrating this process into the process flow of DIMMIC. The wafers were processed in the...