Browse Prior Art Database

USE OF A SPUTTER ETCH PROCESS FOR ILD PLANARIZATION

IP.com Disclosure Number: IPCOM000007048D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2002-Feb-21
Document File: 1 page(s) / 45K

Publishing Venue

Motorola

Related People

Fred Clayton: AUTHOR [+2]

Abstract

Planarization of interlayer dielectrics is an increas- ingly important part of multilayer metal processing. At the same time, metal films are being deposited at higher temperatures to allow for better via filling and electromigration resistance. A lack of ILD planarity combined with a metal film deposited at an elevated temperature can result in significant var- iation in the thickness of the metal film over topog- raphy. This can lead to the potential for leakage paths (stringers) between metal lines in the lower topog- raphy areas on the die. A sputter etch process can be used to shape the edges ofthe steps ofa nonplanar ILD structure, The advantages of the sputter etch process for ILD planarization are listed below: 1) The process is simple, a 100 to 150 second Ar sputter etch is done in a Lam 4SOOi RIE sys- tem. No resist coating or other processing is required. 2) The sputter etch process does not thin the dielectric, the process only shapes the cor- ners. No redeposition ofdielectric is required. 3) The metal thickness variation over topogra- phy is reduced from 2 60% to 5 10%. 4) The leakage between minimum pitch features over topogrraphy is eliminated. 5) The overetch required during the metal etch process is minimized.

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MOTOROLA INC. Technical Developments Volume 20 October 1993

USE OF A SPUTTER ETCH PROCESS FOR ILD PLANARIZATION

by Fred Clayton and Gordon Grivna

  Planarization of interlayer dielectrics is an increas- ingly important part of multilayer metal processing. At the same time, metal films are being deposited at higher temperatures to allow for better via filling and electromigration resistance. A lack of ILD planarity combined with a metal film deposited at an elevated temperature can result in significant var- iation in the thickness of the metal film over topog- raphy. This can lead to the potential for leakage paths (stringers) between metal lines in the lower topog- raphy areas on the die. A sputter etch process can be used to shape the edges ofthe steps ofa nonplanar ILD structure, The advantages of the sputter etch process for ILD planarization are listed below:

1) The process is simple, a 100 to 150 second Ar sputter etch is done in a Lam 4SOOi RIE sys- tem. No resist coating or other processing is required.
2) The sputter etch process does not thin the dielectric, the process only shapes the cor- ners. No redeposition ofdielectric is required.
3) The metal thickness variation over topogra- phy is reduced from 2 60% to 5 10%.
4) The leakage between minimum pitch features over topogrraphy is eliminated.
5) The overetch required during the metal etch process is minimized.

a M010r01a. 1°C. ,993 125

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