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Method for using the chipset AGP GART capability within the execution environment before the operating system is originated

IP.com Disclosure Number: IPCOM000007117D
Publication Date: 2002-Feb-26
Document File: 6 page(s) / 126K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for using the chipset accelerated graphics port (AGP) Graphics Address Remapping Table (GART) capability within the execution environment before the operating system is originated. Benefits include improved performance.

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Method for using the chipset AGP GART capability within the execution environment before the operating system is originated

Disclosed is a method for using the chipset accelerated graphics port (AGP) Graphics Address Remapping Table (GART) capability within the execution environment before the operating system is originated. Benefits include improved performance.

Background

              In the conventional execution environment that exists before the Operating System (pre-OS) is invoked (System BIOS and EFI modules), the following high-level steps are performed:

1.           Pre-OS software executes the minimum chipset initialization.

2.           Pre-OS software detects and initializes the physical memory (RAM) in the system. Memory is available following this step. Prior to the detection of memory, all code executes from Flash (FWH) in a stackless environment.

3.           Pre-OS software copies the entire FWH contents into RAM. This
process is called System BIOS shadowing.

              a.           The count for the number of dwords to be copied from FWH to RAM is copied in the
                            CPU general-purpose register ECX.

              b.           The source address in FWH is loaded in the CPU general-purpose register DS:ESI.

              c.           The destination address in RAM is loaded in the CPU general-purpose register ES:EDI.
              d.           Pre-OS software executes the rep movsd instruction, which copies the contents of FWH
                            into RAM.

4.           Pre-OS software copies the PCI and AGP Option ROMs (Video, LAN, and SCSI) into physical memory below 1 MB. This process is called Option ROM shadowing. The following sub-steps are executed for each of the PCI device Option ROM that must be copied:

              a.           The ECX register is initialized with the count for the number of
                            dwords to be copied from PCI or AGP Option ROM.

              b.           The Option ROM contents source address,
                            which is in the PCI memory range, is loaded in the DS:ESI register.

              c.           The destination address, which is in RAM and below 1 MB, is loaded in the ES:EDI
                            register.

              d.           Pre-OS software executes the rep movsd instruction, which copies the contents of Option
                            ROM into RAM and passes control for initialization to Option ROM.

5.           Pre-OS software completes other platform initialization steps for PIC, PIT, IOAPIC, DMA, ACPI, system power management, hard disk, CDROMs, floppy drive, COM port, parallel port, USB, audio, and modem.

6.           Pre-OS software passes control to the operating system (OS).

              Figure 1 shows the generic system memory map. During steps 3 and 4 (above), the code is copied from FWH and PCI Option ROM space to the shadow memory area below 1 MB.

              AGP provides a mechanism to map a range of untranslated access addresses to a corresponding set of translated addresses using the GART. It has multiple entries which provides mapping for the chipset AGP translator. This GART mechanism is used by the OS video drivers after the pre-OS software passes control.

Description

              The disclosed mechanism utilizes the chipset AGP GART entries to achieve a faster copy of the FWH contents and PCI/AGP Option ROM code into physical memory (see Figure 2).

              AGP ...