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INTERNAL TERMINATION OF CPU SPACE CYCLES IN REDUCED PINCOUNT MCUs

IP.com Disclosure Number: IPCOM000007154D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2002-Feb-28
Document File: 1 page(s) / 79K

Publishing Venue

Motorola

Related People

Oded Yishay: AUTHOR [+3]

Abstract

In the Motorola Modular Microcontroller Fam- ily, as in the 68000 family, the hmction code signals FC[2:0] are basically an extension of the address bus, providing multiple address spaces. These spaces are designated as either user or supervisor, and program or data spaces. One address space has been desig- nated as CPU space to allow the processor to acquire specific control information not normally associated with read or write bus cycles. CPU space cycles are indicated when all FC[2:0] are asserted (logical 1).

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MO-LA Technical Developments Volume 21 February 1994

INTERNAL TERMINATION OF CPU SPACE CYCLES IN REDUCED PINCOUNT MCUs

by Oded Yishay, Ann Hatwood and Joe Jelemensky

INTRODUCTION

SOLUTION

  In the Motorola Modular Microcontroller Fam- ily, as in the 68000 family, the hmction code signals FC[2:0] are basically an extension of the address bus, providing multiple address spaces. These spaces are designated as either user or supervisor, and program or data spaces. One address space has been desig- nated as CPU space to allow the processor to acquire specific control information not normally associated with read or write bus cycles. CPU space cycles are indicated when all FC[2:0] are asserted (logical 1).

  CPU space cycles are used for interrupt acknowl- edge operations, breakpoint acknowledge operations, and the LPSTOP broadcast indication. The CPU Space Type is encoded on bits [19:16] of the address bus during a CPU space cycle. This means that addresses driven during CPU space cycles may be identical to those ofphysical memory locations. The function code signals are used to distinguish the CPU space cycles from memory accesses.

The solution includes several approaches, depending on the specific CPU space cycle type.

  IACK is the most commonly-used CPU space cycle type, so special logic was included to termi- nate IACK cycles with several options: allow the bus monitor to terminate the cycle with Bus Error (BERR), terminate with internal autovector (AVEC), allow the cycle to go external and let external logic terminate it with the Data Transfer Acknowledge (DTACK) pin (if available), or terminate the cycle with internal DTACK. Unlike with previous solu- tions, these options are available without dedicating a chip se...