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TO DRIVE OR NOT TO DRIVE EXTERNAL PINS WHILE IN LOW POWER STOP MODE

IP.com Disclosure Number: IPCOM000007155D
Original Publication Date: 1994-Feb-01
Included in the Prior Art Database: 2002-Feb-28
Document File: 2 page(s) / 104K

Publishing Venue

Motorola

Related People

Oded Yishay: AUTHOR [+3]

Abstract

The Motorola Modular Microcontroller Family MCUs support a Low Power STOP (LPSTOP) mode. In Low Power STOP mode the MCU goes to it's lowest power consumption state under the CPU con- trol. In this LPSTOP mode, the external bus is not used by the MCU since the CPU is not available to run external bus cycles. To reduce the MCU's cur- rent drain, internal and external clocks of the MCU are stopped when the MCU enters the LPSTOP mode.

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MOTOROLA Technical Developments Volume 21 February 1994

TO DRIVE OR NOT TO DRIVE EXTERNAL PINS WHILE IN LOW POWER STOP MODE

by Oded Yishay, Joe Jelemensky and Sangrock Jin

Microcontroller Family, the user controls the bus state while in LPSTOP mode as desired.

INTRODUCTION

  The Motorola Modular Microcontroller Family MCUs support a Low Power STOP (LPSTOP) mode. In Low Power STOP mode the MCU goes to it's lowest power consumption state under the CPU con- trol. In this LPSTOP mode, the external bus is not used by the MCU since the CPU is not available to run external bus cycles. To reduce the MCU's cur- rent drain, internal and external clocks of the MCU are stopped when the MCU enters the LPSTOP mode.

SOLUTION

  In the GRIM, the EBR (External Bus Request) pin is used to control whether the external bus con- tinues to be driven to it's last state, or whether it should be set to high impedance state. The same EBR pin, which is used for this function in normal mode of operation is also used while the MCU is in the LPSTOP mode. When the GRIM enters LPSTOP mode and EBR is negated, it continues to drive any signals which have been driven. If EBR is asserted when the GRIM enters: LPSTOP mode, then the GRIM will set the external bus to high impedance state. Likewise, if EBR is asserted while the GRIM is already in LPSTOP mode, the GRIM will set the external bus to high impedance state. At this time other microprocessor can take control of the exter- nal bus. The circuit which controls the bus state in LPSTOP mode is asynchronous. Asynchronous means that no clock is required to select the required state of the external bus.

  The solution can be better understood by refer- ring to the attached diagram. The signal "SET" and "RST" are the signals which are used to control the

bus state in normal mode of operation. These con- trols are generated synchronously, by a circuit that requires the system clock to be applied. The signal "Ib-LPSTOP_MODE" is asserted when the MCU

enters the LPSTOP mode, and remains asserted as long as the MPU is in this mode. The signal "EBR" is the asynchronous input of the EBR external pin, and reflects the state of;,the EBR external pin. No clock is required to generate this signa...