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ULTRA-LOW THRESHOLD POWER MOSFET

IP.com Disclosure Number: IPCOM000007327D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2002-Mar-15
Document File: 2 page(s) / 109K

Publishing Venue

Motorola

Related People

Gordon Tam: AUTHOR [+3]

Abstract

Low threshold voltage power transistor becomes increasingly important as more and more systems operate at lower operating voltage. HDTMOS is a suitable power transistor technology to achieve very low on resistance at low operating voltage. One crit- ical issue we face in ultra-low threshold power MOSFET is to achieve low threshold voltage with- out increasing leakage current at the maximum spec- ified Vds. Leakage current increases mainly due to short channel effect in optimizing the device for on resistance. A closer look at the HDTMOS structure (Figure 1) show that the controlling factor for thresh- old voltage and the leakage current are not the same. Threshold voltage is control mainly by the high dop- ing concentration of the PHV region near the edge of the gate oxide. The leakage current is the genera- tion and recombination current from the N-epi and PHV juction. One solution to this problem is to intro- duce a counterdoping implant to the PHV region that will compensate the high doping concentra- tion near the edge of the gate oxide but maintain the same N-epi and PHV junction characteristic. In the case of the N-channel HDTMOS, a counter- dopant such as phosphorus or arsenic can be implanted into the PHV region at the same time the PHV is implanted or at a later time afier the PHV implant has been annealed. The slower dit'fu- sivity from phosphorus or arsenic will not interfare the tail end of the PHV profile but has a significant effect on the peak carrier concentration of the PHV profile. Figure 2a shows the final PHV profile on epi that do not have a counterdoping implant. The peak carrier concentration is about 3El7 cm-j. Fig- ure 2b shows the same final PHV profile with an additional phosphorus counterdoping implant. The peak carrier concentration is at 1.2 El7 cm-j, but more importantly the tail end of the PHV proftle did not change. Comparing the electrical character- istic of the two type of devices also confirm the tind- ing as shown in Table 1. The leakage current and the breakdown voltage are similar for both type of devices while the mean threshold voltage decreases from 1.14 V to 0.88 V Fig. 1 Cross-sectional Structure For A N-channel HDTMOS 12 0 Motorola. Inc. 19% 0 M MO7VROLA Technical Developments Volume 24 March 1995 Depth'bm) 'A "' Fig. 2 PHV Profile without Counterdoping lmplai 1t Depth-@m) .-I Fig. 3 PHV Profile with Counteraoptng Implant Table 1 Comparisx 01 The ElectrIcal Parameters with And without Counterdoping lmplanl Condition ldss 012 V BVdSS Threshold Voltage No counterdoping hphlt 2.otM.32 nA 29.3i1.14 v 1.14io.33 v Counleldcplng IlllPl~I 2.05M.32 nA 29.9ia.13 v 0..3&0.055 v 13

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MO7VROLA Technical Developments Volume 24 March 1995

ULTRA-LOW THRESHOLD POWER MOSFET

by Gordon Tam, Pak Tam and Hak-Yam Tsoi

  Low threshold voltage power transistor becomes increasingly important as more and more systems operate at lower operating voltage. HDTMOS is a suitable power transistor technology to achieve very low on resistance at low operating voltage. One crit- ical issue we face in ultra-low threshold power MOSFET is to achieve low threshold voltage with- out increasing leakage current at the maximum spec- ified Vds. Leakage current increases mainly due to short channel effect in optimizing the device for on resistance. A closer look at the HDTMOS structure (Figure 1) show that the controlling factor for thresh- old voltage and the leakage current are not the same. Threshold voltage is control mainly by the high dop- ing concentration of the PHV region near the edge of the gate oxide. The leakage current is the genera- tion and recombination current from the N-epi and PHV juction. One solution to this problem is to intro- duce a counterdoping implant to the PHV region that will compensate the high doping concentra- tion near the edge of the gate oxide but maintain the same N-epi and PHV junction characteristic. In

the case of the N-channel HDTMOS, a counter- dopant such as phosphorus or arsenic can be implanted into the PHV region at the same time the PHV is implanted or at a later time afier the PHV implant has been annealed. The slower dit'fu- sivi...