Browse Prior Art Database

TRENCH MOSFET STRUCTURE AND PROCESS FOR SRAM BIT CELLS

IP.com Disclosure Number: IPCOM000007378D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2002-Mar-20
Document File: 3 page(s) / 99K

Publishing Venue

Motorola

Related People

Rick Sivan-APRDL: AUTHOR

Abstract

ADVANTAGES OF NEW STRUCTURE In order to achieve sufficient bit stability in competitively-sized SRAM bit cells, 50-55 square feature sizes are required with existing/known struc- tures and processes. The need exists for achieving both improved bit stability as well as fewer square features per bit cell in future generation SRAMs.

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MOTOROLA Technical Developments Volume 24 March 1995

TRENCH MOSFET STRUCTURE AND PROCESS FOR SRAM BIT CELLS

by Rick Sivan-APRDL

ADVANTAGES OF NEW STRUCTURE

  In order to achieve sufficient bit stability in competitively-sized SRAM bit cells, 50-55 square feature sizes are required with existing/known struc- tures and processes. The need exists for achieving both improved bit stability as well as fewer square features per bit cell in future generation SRAMs.

  This invention consists of concentric vertical MOSFETs that have a particular utility when applied in an SRAM bit cell. The structure provides the key elements for the integrated concentric construction in a bit cell. Enhancements include the formation of the Transfer Gate trench MOSFET and Latch Gate trench MOSFET separately in. order to separately optimize the MOSFET properties of channel length and gate dielectric thickness of each type device. Figures 1 and 2 illustrate one implementation of the invention in an SRAM bit cell.

1. Cell stability: Cell ratio = 4 with Transfer and Latch MOSFETs having equal Leffand tax, and > 4 if Leffand tax modified appropriately.
2. Sob Error Rate: Since most rays ofalpha particle paths is short in this structure (excepting the less disruptive, normally incident events) the charge created by an alpha hit is smaller than that in a conventional SRAM bit cell. Furthermore, this structure lends itself well to ontimizing the capac- itance ofthe storage node.
3. The sample layo...