Browse Prior Art Database

LOW VOLTAGE CURRENT REFERENCE FOR CGAAS

IP.com Disclosure Number: IPCOM000007460D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2002-Mar-28
Document File: 2 page(s) / 81K

Publishing Venue

Motorola

Related People

Jeff Dykstra: AUTHOR

Abstract

The design of a start-up circuit is also critical. With Cgaas" technology, there are three potentially stable states: zero current, the desired current, and a state where only the gates ofthe FETs are conducting. The reference shown here has a circuit which ensures that only the desired state is stable.

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MOlVROLA Technical Developments

8

LOW VOLTAGE CURRENT REFERENCE FOR CGAAS"

by Jeff Dykstra

  The design of a start-up circuit is also critical. With Cgaas" technology, there are three potentially stable states: zero current, the desired current, and a state where only the gates ofthe FETs are conducting. The reference shown here has a circuit which ensures that only the desired state is stable.

1: INTRODUCTION

  A circuit which provides a current reference is required for many analog functions performed with integrated circuit technology. This reference is spe- cifically for Cgaas" applications with a supply ofabout 1V

  We want a circuit that can self-generate a cur- rent, and use no components external to the inte- grated circuit (IQ and the current should be insen- sitive to fluctuations in supply voltage, temperature, and IC processing variability. Other circuits on the IC can then reference this current.

  There are no known prior solutions for this prob lem in Cgaas. In particular, a current reference for low voltage supplies is difficult in any IC technol- ogy. The 1 V supply requirement eliminates many popular reference topologies.

3: OPERATIONAL DETAILS

  The current is set by Pi's V,, across Rll. The current through Pi's drain and RI1 are set equal by current mirrors Nl and N2, respectively. P7 provides the feedback path and provides loop gain. N4 is the main current mirror for the whole circuit. P7 also clamps PI's VDS independently of supply voltage. This improves supply rejection, since these FETs do not have low out...