Browse Prior Art Database

QUANTUM SRAM CELL

IP.com Disclosure Number: IPCOM000007488D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2002-Apr-01
Document File: 2 page(s) / 60K

Publishing Venue

Motorola

Related People

Jy-Der Tai: AUTHOR [+3]

Abstract

Figure 1 shows a dual-port SRAM cell which write-transistor when WRITE is high. The data consists of two MOS transistors and two quantum stored on bottom quantum diode is read through diodes. Two stable states of the bottom quantum diode . the read-transistor when READ is HIGH. are used to store data which is written from VDD I I toe III <----quantum diode WRITE READ -----s------x x--'--<------ DATA _I- -I- BITLINE ----->-----I ,---------x--------, ,---->------ write-transistor I read-transistor I I <-----'Cell-state I bottom quantum diode ----> I], I I vss Fig. 1 Dual-port SRAM cell.

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Page 1 of 2

Technical Developments

QUANTUM SRAM CELL

by Jy-Der Tai, Saied Tehrani and Jun Shen

  Figure 1 shows a dual-port SRAM cell which write-transistor when WRITE is high. The data consists of two MOS transistors and two quantum stored on bottom quantum diode is read through diodes. Two stable states of the bottom quantum diode . the read-transistor when READ is HIGH.
are used to store data which is written from

VDD I I toe III <----quantum diode

WRITE READ -----s------x x--'--<------

DATA _I- -I- BITLINE ----->-----I ,---------x--------, ,---->------ write-transistor I read-transistor

I

I <-----'Cell-state I


bottom
quantum diode ----> I],

I I vss

Fig. 1 Dual-port SRAM cell.

  Figure 2 shows a low power write dual-port circuit current when writing. PMOS transistor has SRAM cell in which a PMOS transistor is used in to turn on before the write transistor turns offwhen conjunction with the write transistor. The PMOS WRITE is switching low.
transistor turns off the biasing circuit to save short

WD I I pull-up transistor

I --01:: I

            I WRITE READ ----->v----ex---'x x-----<------

-I- -I- ----->----, ,---------X-----------I ,---->------

I DATA I BITLINE

I<-----Cell-state I
bottom I
quantum diode ----> 11 I

I I vss

Fig. 2 Low power write dual-port SRAM cell,

0 blotoro,a. 1°C. ,995 156 July 199.5

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Page 2 of 2

MoTylRoLA Technical Developments

  Figure 3 shows a low power read dual-port transistor turns on to provide more current...