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A NEW TECHNIQUE TO STRENGTHEN SILICON MICROMACHINED PRESSURE SENSOR

IP.com Disclosure Number: IPCOM000007492D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2002-Apr-01
Document File: 6 page(s) / 311K

Publishing Venue

Motorola

Related People

K. Sooriakumar: AUTHOR [+3]

Abstract

In a piezoresistive pressure sensor, a deep cavity is etched using chemicals such as NaOH or KOH to product a thin diaphragm. These chemicals etch along well-defined crystal planes, creating sharp cor- ners inside the cavity. These corners result in a stress concentration which reduces the strength of the struc- ture and limits over-pressure capability especially for back/cavity-side pressure applications. In the past, an additional isotropic wet etch (HNOs, HF and acetic acid) was used to round these corners to increase burst pressure strength. In this paper we present a dry etch method and compare it to the conventional wet etch method for increasing device strength. We will also discuss a variation ofthis dry etch technique as applied to direct wafer bonded wafers.

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Technical Developments

A NEW TECHNIQUE TO STRENGTHEN SILICON MICROMACHINED PRESSURE SENSOR

by K. Sooriakumar, Andy Mirza, and Wendy Chan

  In a piezoresistive pressure sensor, a deep cavity is etched using chemicals such as NaOH or KOH to product a thin diaphragm. These chemicals etch along well-defined crystal planes, creating sharp cor- ners inside the cavity. These corners result in a stress concentration which reduces the strength of the struc- ture and limits over-pressure capability especially for back/cavity-side pressure applications. In the past, an additional isotropic wet etch (HNOs, HF and acetic acid) was used to round these corners to increase burst pressure strength. In this paper we present a dry etch method and compare it to the conventional wet etch method for increasing device strength. We will also discuss a variation ofthis dry etch technique as applied to direct wafer bonded wafers.

  Silicon ~100~ wafers were prepared using stand- ard IC processing. A thin layer of insulator was grown on the surface. The wafers were patterned with square openings (100x100 mils) on one side. The insulator was removed in the square regions, and deep cavi- ties were etched with KOH (see Fig. 1). These wafers were divided into two groups for corner rounding. In the first group, the corners were rounded with conventional wet etch as mentioned above. In the second group, the corners were rounded in a plasma etch system using 25 to 100 seem SF6. The corner radius of curvature was then measured from SEM photos, and device back-side burst pressure was recorded.

Similarly, SiO2/SiO2 bonded wafers were patterned and cavities were etched (Fig. 2). Silicon

oxide is removed in an RIE system using 3 to 5 seem SF6 and 30 to 41 seem CHF3. Then the cor- ners were rounded using the plasma process described above.

  Fig. 3 shows an SEM photo of a standard cavity with no corner rounding. Fig. 4a shows the cavity corner rounded with wet etching. Fig 4b shows the radius of curvature for different wet etch times. Fig. 5a shows the cavity corner as etched in plasma. Fig. 5b shows the radius of curvature for different etch times and gas flows. Fig 6 shows burst pressure as a function of radius of curvat...