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Method for a hybrid radio architecture Disclosure Number: IPCOM000007498D
Publication Date: 2002-Apr-01
Document File: 7 page(s) / 148K

Publishing Venue

The Prior Art Database


The disclosed method is for a hybrid radio architecture. Benefits include improved functionality and improved performance.

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Method for a hybrid radio architecture

The disclosed method is for a hybrid radio architecture. Benefits include improved functionality and improved performance.

General description

              The disclosed description includes an integrated differential CMOS radio with differential AGC and on-flight discrete time domain pre-distortion for high linearity in transmission with a fixed high-frequency RF front end and universal protocol and modulation capabilities handled by a discrete-time hardwired communication processor.

              This universal CMOS radio architecture uses in-phase (I) and quadrature (Q) components of transmitted and received signals. The RF front-end operates at fixed frequencies, and all modulation and communication techniques for spread-spectrum are handled by a hardwired digital communication processor integrated with the RF front end.

              The radio uses a quasi-homodyne (quasi-direct-conversion) receiver chain, where the incoming RF signal from the antenna is down-converted to a very low frequency clear from the low-frequency noise corner of the submicron CMOS transistor technology used in the circuits. The final conversion to baseband (with associated image cancellation) is done in the discrete time domain (after the A/D converters).

              In the transmission, correctly modified signals are sent by the integrated communication processor to the fixed-frequency RF front-end to generate any modulation or communication scheme at the antenna by simple up conversion and addition operations. Differential AGC is implemented in both receiving and transmitting chains by shorting differential signal lines and preserving bias levels and balance of signal lines.

              During power-up procedures, the RF front end has its transmitted signal looped back to the discrete time section of the Radio by the receiving chain. This signal is used to evaluate the amount of pre-distortion the message needs to have prior to sending to the RF front end for transmission with high linearity and spectrum use specifications. All the pre-distortion is made in the discrete time domain.

              The hybrid radio (RF front end and hardwired digital communication processor) is to be integrated with a general-purpose digital processor. The upper network layer tasks are handled by the general-purpose processor that the hybrid radio is companion to.



      The disclosed method provides several advantages over the conventional solution, including:

§         Continuous time domain and discrete time domain sections in the receiving and transmitting chains

§         Universal and fixed RF front end from the low-noise integrated local oscillators for the RF front end

§         High sensitivity and robustness from the A/D converters and image cancellation in the discrete time-domain at frequencies above the low-frequency noise corner for submicron CMOS

§         Flexibility and robustness from the channel selection and spread spectrum (direct sequence or frequency hopping) done at discrete-time domain

§         High-linearity and optimum spectru...