Browse Prior Art Database

NON-INTRUSIVE BUILT-IN SELF TEST MEANS AND APPARATUS

IP.com Disclosure Number: IPCOM000007544D
Original Publication Date: 1995-Nov-01
Included in the Prior Art Database: 2002-Apr-04
Document File: 3 page(s) / 152K

Publishing Venue

Motorola

Related People

Mark Spiotta: AUTHOR

Abstract

Customers expect that most hardware today- especially digital or processor-based hardware-be capable of diagnostic testing and fault reporting. These diagnostic tests, whether software-initiated or hardware BIST, have always required that the hard- ware be taken "off-line" to apply stimulus to the hardware, followed by a response measurement to assess the "health" ofthe hardware.

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MolylRoLA Technical Developments

NON-INTRUSIVE BUILT-IN SELF TEST MEANS AND APPARATUS

by Mark Spiotta

  Customers expect that most hardware today- especially digital or processor-based hardware-be capable of diagnostic testing and fault reporting. These diagnostic tests, whether software-initiated or hardware BIST, have always required that the hard- ware be taken "off-line" to apply stimulus to the hardware, followed by a response measurement to assess the "health" ofthe hardware.

  This approach causes several problems; either the tests can only be executed at power-up, or the software (or hardware) must wait for an "idle period" to switch off normal operation and invoke the diag- nostic tests. In addition, while the tests are execut- ing, normal operation is inhibited, which has nega- tive user impact such as lost, delayed, or truncated calls.

  Thus it is desired to accurately test and assess the status ofthe hardware during normal operation. DESCRIPTION OF THE INVENTION:

  This approach provides the means and appara- tus to test the hardware "health" using non- traditional BIST techniques. These tests occur dur- ing normal operation and thus do not interfere with the expected operation ofthe hardware. The disclosed technique is premised on the assumption that cer- tain hardware operations will occur many times dur- ing normal device operation, and once the expected response to an operation is known, it can be applied to future operations to ensure that the device remains fimctional.

Diagnostic testing takes place non-intrusively by monitoring the stimulus to a given hardware block

as well as the response from the block for a variety of operating modes. The response is then compared to a previously-stored response to detect abnormali- ties. During normal operation, this approach also provides the means to learn new stimulus/response patterns so that it can adapt to changing operating conditions or applications.

  This methodology differs from traditional BIST approaches because it does not apply stimulus to the module/device under test (DUT). Rather, it non- intrusively monitors the inputs (i.e. stimulus) to the DUT as well as the outputs (i.e. response) from the DUT Figure 1 shows the overall architecture for the non-intrusive BIST apparatus. Multiple-input Linear Feedback Shifi Registers (LFSRs/MISRs) are used in a signature analysis mode to compress the stimulus and response each into a single word. The memory is a "history" RAM which stores the pairs of stimulus and response signatures, or test vectors, A BET controller is also used to capture the stimu- lus and response signatures, to compare them to other entries stored in the RAM, and to indicate a failure condition when appropriate.

  Initially, the RAM contains only a few stimulus/ response signature pairs. These pairs can be loaded at power-up or permanently stored in memory. The stimulus signatures in these pairs are guaranteed to appear-typically during startup sequences a...