Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

A High Performance RapidIO Asynchronous Interface Mechanism

IP.com Disclosure Number: IPCOM000007645D
Original Publication Date: 2002-Apr-10
Included in the Prior Art Database: 2002-Apr-10
Document File: 1 page(s) / 25K

Publishing Venue

Motorola

Related People

Gus Ikonomopoulos: AUTHOR [+3]

Abstract

A high performance asynchronous interface exists between the RapidIO port's physical and protocol layers. When an error occurs on this interface, due to synchronization, data may get corrupted. This mechanism prevents / minimizes the incidence of data corruption.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 81% of the total text.

A High Performance RapidIO Asynchronous Interface Mechanism

Gus Ikonomopoulos, Srinath Audityan, and Jose Nunez

 

A high performance asynchronous interface exists between the RapidIO port's physical and protocol layers. When an error occurs on this interface, due to synchronization, data may get corrupted. This mechanism prevents / minimizes the incidence of data corruption.

Body

In order to achieve high performance across the asynchronous interface a circular FIFO design is used. When an error occurs on this interface, due to synchronization, an extra entry becomes valid in the asynchronous queue. The impact of a synchronization error is minimized by the use of synchronization flip-flops for the write pointer, as it crosses the asynchronous interface, and Grey code for both the write and read pointers, ensuring that only one extra entry is consumed.

 

Having chosen a depth of six entries for this circular FIFO (as an example), under normal operating conditions without having encountered any errors, three entries are valid, allowing a tolerance of three errors before data in the circular FIFO gets corrupted. By expecting a maximum difference of three between the write and read pointers, a synchronization error is detected and generates an outbound throttle control symbol, which demands that a specified amount of idle control symbols be sent immediately to the originator of the throttle control symbol.

 

In order to allow the circular FIFO to recover (regain available entries), dat...