Browse Prior Art Database

CRYPTOGRAPHIC SIGNAL PROCESSOR

IP.com Disclosure Number: IPCOM000007668D
Original Publication Date: 1996-May-01
Included in the Prior Art Database: 2002-Apr-12
Document File: 2 page(s) / 101K

Publishing Venue

Motorola

Related People

Kenneth C. Fuchs: AUTHOR

Abstract

Presented here is the idea of a Cryptographic Signal Processor (or CSP for short). The CSP is essen- tially a micro-processor which has specialized hard- ware tools that can efficiently perform many of the tasks and computations that are required by most crypto-algorithms. See figure. The advantage of a CSP is that it will be able to quickly compute crypto- algorithms (and control the entire crypto-system) with low power consumption and without the need to build any custom circuitry. Furthermore, the CSP retains the flexibility inherent to any micro-processor based device. Also, the CSP will have specific on-chip memory blocks that can be used to highten the secu- rity of the crypto-system in which it may be embedded.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 50% of the total text.

Page 1 of 2

8 MmROLA Technical Developments

CRYPTOGRAPHIC SIGNAL PROCESSOR

by Kenneth C. Fuchs

  Presented here is the idea of a Cryptographic Signal Processor (or CSP for short). The CSP is essen- tially a micro-processor which has specialized hard- ware tools that can efficiently perform many of the tasks and computations that are required by most crypto-algorithms. See figure. The advantage of a CSP is that it will be able to quickly compute crypto- algorithms (and control the entire crypto-system) with low power consumption and without the need to build any custom circuitry. Furthermore, the CSP retains the flexibility inherent to any micro-processor based device. Also, the CSP will have specific on-chip memory blocks that can be used to highten the secu- rity of the crypto-system in which it may be embedded.

  The CSP will have a Central-Processing-Unit (CPU) at its core which contains a mathematically efficient Arithmetic-Logic-Unit (ALU) similar to that used in a DSP chip. This ALU will be capable of performing quick Modulo-N arithmetic. The CPU will have a large word size, say 64 bits wide, so that it can quickly process large pieces of data from block- type algorithms.

  Since many crypto-algorithms require the use of shit? registers, the CPU will have access to sev- eral long shill registers (say 64 bits each). These shih registers will all be configurable to any length and can be concatenated. Furthermore, each shift register can be configured so as to allow any tap or combination of taps to be fedback and Exclusive- ORed into its input. In this way many different types of Linear-Feedback-Shill-Registers can be set up in hardware.

The CPU will also have access to a 64-bit generic

permutation register. Many vector permutations are computationally exhaustive, yet they can be done quite easily with dedicated hardware. With this tool, a permutation rule is loaded in, and various muxes, encoders and decoders are configured to allow for an almost instantaneous permutati...