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A CALIBRATION ALGORITHM FOR ABSOLUTE AND RELATIVE TOLERANCES IN CMOS AND BiCMOS INTEGRATED RESISTORS

IP.com Disclosure Number: IPCOM000007678D
Original Publication Date: 1996-May-01
Included in the Prior Art Database: 2002-Apr-15

Publishing Venue

Motorola

Related People

Jesus Pena-Finol: AUTHOR [+3]

Abstract

Precision analog IC functions such as filtering and signal conversion (A/D and D/A converters) require precise component matching for their reali- zations in silicon. However, the hmdamental limita- tions associated with analog integrated circuits such as the poor tolerance and mismatch of integrated resistors and capacitors limits, considerably, the achievable level of precision. To circumvent these limitations, expensive hybrid circuits combining two or more different and costly technologies are used. Complex thin-film resistor processing and laser trim- ming are still used to provide the necessary compo- nent matching. To reduce the cost associated with these process related solutions, CMOS circuit tech- nique solutions such as switched-capacitor and g,-C filtering [l-2] and self-calibrating A/D converters [3] have been proposed. All ofthese circuit related solu- tions makes exclusive use of integrated capacitors as the precision element to set pole/zero position in filters, for bandwidth definition, and to obtain pre- cise fractions of a reference voltage in A/D and D/A converters. On the other hand, integrated resistors typically have poor absolute accuracy (20-50%) and relatively high temperature coefficients (200-2000 ppm/"C) which limits the accuracy of data convert- $1 "REF ers to the &bit level and makes impractical the real- ization of conventional active filters since the -3dB bandwidth can vary by a full order of magnitude. Furthermore, only moderate resistance values can be obtained due to the relatively low sheet resist- ance of CMOS and BiCMOS processes (l-2.5 kQ/sq). These drawbacks have limited the use of integrated resistors as precision components.

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MOTVROLA Technical Developments

A CALIBRATION ALGORITHM FOR ABSOLUTE AND RELATIVE TOLERANCES IN CMOS AND BiCMOS INTEGRATED RESISTORS

by Jesus Pena-Finol, Mark Chambers and James Phillips

  Precision analog IC functions such as filtering and signal conversion (A/D and D/A converters) require precise component matching for their reali- zations in silicon. However, the hmdamental limita- tions associated with analog integrated circuits such as the poor tolerance and mismatch of integrated resistors and capacitors limits, considerably, the achievable level of precision. To circumvent these limitations, expensive hybrid circuits combining two or more different and costly technologies are used. Complex thin-film resistor processing and laser trim- ming are still used to provide the necessary compo- nent matching. To reduce the cost associated with these process related solutions, CMOS circuit tech- nique solutions such as switched-capacitor and g,-C filtering [l-2] and self-calibrating A/D converters [3] have been proposed. All ofthese circuit related solu- tions makes exclusive use of integrated capacitors as the precision element to set pole/zero position in filters, for bandwidth definition, and to obtain pre- cise fractions of a reference voltage in A/D and D/A converters. On the other hand, integrated resistors typically have poor absolute accuracy (20-50%) and relatively high temperature coefficients (200-2000 ppm/"C) which limits the accuracy of data convert-

$1

"REF

ers to the &bit level and makes impractical the real- ization of conventional active filters since the -3dB bandwidth can vary by a full order of magnitude. Furthermore, only moderate resistance values can be obtained due to the relatively low sheet resist- ance of CMOS and BiCMOS processes (l-2.5 kQ/sq). These drawbacks have limited the use of integrated resistors as precision components.

PROPOSED SOLUTION AND SIMULATIONS:

  This research proposes a method to compen- sate for the non-idealities of integrated resistors. It is based on the measurement of a DC voltage pro- portional to the mismatch error (relative tolerance) or to sheet resistance variations (absolute tolerance) associated with integrated resistors in either CMOS or BiCMOS technologies. It requires two good qual- ity capacitors (e.g., poly-poly) and three CMOS switches opening and closing following a prescribed switching sequence controlled by a master clock.

  Figure 1 shows the basic circuit used to perform an error measurement algorithm. It consists of two identical resistors, a reference voltage V,,,, two well matched capacitors and three switches controlled by clock phases 81 and 02. The resistors, V,,,

$2

"REF

Re Vm Ri(lt6) " ~C

Re

Vm Ri(lt 6)

T

fC

Fig. 1

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MOFOROLA Technical Developments

combination forms a voltage divider with V, as the middle tap voltage. In a perfect matched condition V, woul...