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Method for a semiconductor package with an integrated self-alignment and retention feature

IP.com Disclosure Number: IPCOM000007689D
Publication Date: 2002-Apr-15
Document File: 4 page(s) / 153K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a semiconductor package with an integrated self-alignment and retention feature. Benefits include improved reliability and simplified manufacturing process.

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Method for a semiconductor package with an integrated self-alignment and retention feature

Disclosed is a method for a semiconductor package with an integrated self-alignment and retention feature. Benefits include improved reliability and simplified manufacturing process.

Background

              An over-molded semiconductor package can be surface mounted onto a flexible tape interconnect (see Figure 1). The tape folds to form the package. Recessions (or dimples) are molded into the mold cap as reservoirs to reduce the thickness of the adhesive used to hold the folded component together (see Figure 2).

              A conventional solution includes the use of robotic assembly equipment and the application of external adhesives.

Description

              The disclosed method aligns the folded package components (see Figure 3). The use of precision press fits, snap, or interlocking features provides retention between the two package segments (see Figure 4). These alignment and retention features can also be applied to the test socket and other equipment (see Figure 5). A positive locking feature securely snaps the package segments into place (see Figure 6).

              The alignment features support lower cost manufacturing through higher speed and less precision during the package folding operation while controlling package dimensions and placement. The requirement for adhesives to hold package segments together is eliminated or reduced. Because the device is held together, the adhesive cure step can occur away from the folding...