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Detection of Capacitive Load for Driver Selection at Power Up

IP.com Disclosure Number: IPCOM000007734D
Publication Date: 2002-Apr-17
Document File: 4 page(s) / 168K

Publishing Venue

The IP.com Prior Art Database

Abstract

In the field of voltage regulators, driver controllers are used to select and control the operation of power transistors to provide regulated output voltages. The more advanced controller schemes require that the controller, usually a single chip integrated circuit (IC), must detect the driver configuration or mode for high side or low side drive at power up to enable proper operation. Prior art solutions utilized an extra pin on the controller IC to provide an external input for the purpose of mode selection, which increases the number of pins on the IC. Another prior art method is use of a communication port which is slow as well as requires overhead in the communication protocol. Therefor, it would be highly advantageous to produce a driver controller IC having fewer pins and internal circuitry to detect the mode selection needed for efficient start-up.

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Detection of Capacitive Load for Driver

Selection at Power Up

Background of the Invention

In the field of voltage regulators, driver controllers are used to select and control the operation of power transistors to provide regulated output voltages.  The more advanced controller schemes require that the controller, usually a single chip integrated circuit (IC), must detect the driver configuration or mode for high side or low side drive at power up to enable proper operation.  Prior art solutions utilized an extra pin on the controller IC to provide an external input for the purpose of mode selection, which increases the number of pins on the IC.

Another prior art method is use of a communication port which is slow as well as requires overhead in the communication protocol.

Therefor, it would be highly advantageous to produce a driver controller IC having fewer pins and internal circuitry to detect the mode selection needed for efficient start-up.

Detailed Description of the Invention

In order to provide the internal mode selection feature without addition of an external pin, it is necessary to measure the capacitance on the drive pin to determine the capacitive load for FET driver selection. In the invention, this is performed using a current source and timer with control and select circuitry as follows.

Figure 1: Detection of Capacitive Load for FET Selection

   At power up, the circuit sources a current I into the node in question.  At time T1, the output of the comparator is latched to Q1.  Again at time T2, the output of the comparator is latched at Q2.  If after time T2 the outputs Q1 and Q2 are...