Browse Prior Art Database

A TRUTH TABLE MERGE FUNCTION

IP.com Disclosure Number: IPCOM000007769D
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2002-Apr-22
Document File: 4 page(s) / 201K

Publishing Venue

Motorola

Related People

Jesse Tessier: AUTHOR

Abstract

This paper describes the architecture and bene- fits of a new application program MERGE-TABLE. This program creates a single truth table model which describes the fimctionality of two digital com- ponents given a specification of the signals or nets which interconnect them and a specification of the truth tables for the two individual components. Dig- ital simulators typically support truth tables as one of the ways in which components can be fimction- ally modeled. By combining frequently occurring interconnections of components into a single higher level component with a single truth table model, the component count within the simulation can be reduced, simulation speed can be increased, and the memory requirements for the digital simulator can be reduced.

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Technical Developments

A TRUTH TABLE MERGE FUNCTION

by Jesse Tessier

ABSTRACT

INTRODUCTION

  This paper describes the architecture and bene- fits of a new application program MERGE-TABLE. This program creates a single truth table model which describes the fimctionality of two digital com- ponents given a specification of the signals or nets which interconnect them and a specification of the truth tables for the two individual components. Dig- ital simulators typically support truth tables as one of the ways in which components can be fimction- ally modeled. By combining frequently occurring interconnections of components into a single higher level component with a single truth table model, the component count within the simulation can be reduced, simulation speed can be increased, and the memory requirements for the digital simulator can be reduced.

  Components in a digital simulation model library are often modeled with simulation primitives. These primitives include built-in primitives which are log- ical functions whose truth table is pre-defined to the simulator and user-defined primitives for which the user provides a truth table to describe its input/output/state behavior.

  A truth table model (see Figure 1) lists the inputs and outputs of a component and then enumerates the signals which occur at the outputs for each pos- sible combination of signals at the inputs. Truth tables can describe states, or signals which are "re- membered" by the circuit, by listing a signal as both an input and an output. The value of the signal on the input side represents its previous "remembered" state and on the output side represents its new state. It is common for truth tables to support the descrip- tion of input signals as either a static signal (0, 1, or
X) or a transition [old new] where the input changes from an old static signal to a new one.

Inputs D, CK, RESJ2T.Q;

Outputs Q;

Sequence RESET, CK, D, Q: Q; # State Table

1, by anyI, my : 0; 0, [O 11.0, any : 0;

0, [O 11, 1, any : 1; 0, [O 01, any, any: same;

0.v ql, my, any: same;

NOTE:

any = matches an actual value of 0, 1, or x

0 = describes an inputs [from to] transition

Fig. 1 Truth Table for a Simple Flip Flop

cl Motorola. 1°C. IW6

68 August 1996

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MOlVROLA Technical Developments

  Higher level components can be modeled by describing an interconnection of primitives which would exhibit the appropriate behavior. Modeling with primitives is not the only digital modeling method, but it is the most common.

  Some interconnections of primitives will occur frequently in a component library. For example, a master latch and slave latch may be independently modeled as user-defined primitives but they are ofien used connected together to create a flip flop. Another example may be the creation ofa scannable flip flop by feeding the data input of a master-slave flip flop with the output ofa mux.

  The runtime and memory requirements o...