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A COMPREHENSIVE MODULE DISABLE FUNCTION FOR MULTI-MODULE EMBEDDED SYSTEMS

IP.com Disclosure Number: IPCOM000007771D
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2002-Apr-22
Document File: 8 page(s) / 382K

Publishing Venue

Motorola

Related People

Alfred L. Crouch: AUTHOR [+3]

Abstract

There are times when "Time-to-Market" is more important than the cost of silicon. One example is when entering a new market where there is already competition. Bringing a new device into a market significantly later than other devices results fin loss of market share. Another example is when a spe- cific customer requests a delivery date that is earlier than the current design and fabrication cycle time. For these cases the question is, "are there methods that can be used to capitalize on existing silicon to provide saleable product earlier?' There are other situations when "Yield" is the problem. Many parts are being made, but the yield ofgood saleable devices is low due tdlocalized man- ufacturing defects or design errors. In this case the question asked is, "ifthe defects or design errors are localized to within a module, can that module be isolated and effectively removed so that the die can be reclaimed as a part that does not include that module?' There are techniques that can be applied which will allow both the re-use of existing silicon to rep- resent a new device with less functionality, and to be able to reclaim bad die that has localized defects or design errors contained within a module or modules.

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8 MolloRolA Technical Developments

A COMPREHENSIVE MODULE DISABLE FUNCTION FOR MULTI-MODULE EMBEDDED SYSTEMS

by Alfred L. Crouch, Clifford L. ParrotI and Christopher N. Hinds

INTRODUCTION

  There are times when "Time-to-Market" is more important than the cost of silicon. One example is when entering a new market where there is already competition. Bringing a new device into a market significantly later than other devices results fin loss of market share. Another example is when a spe- cific customer requests a delivery date that is earlier than the current design and fabrication cycle time. For these cases the question is, "are there methods that can be used to capitalize on existing silicon to provide saleable product earlier?'

  There are other situations when "Yield" is the problem. Many parts are being made, but the yield ofgood saleable devices is low due tdlocalized man- ufacturing defects or design errors. In this case the question asked is, "ifthe defects or design errors are localized to within a module, can that module be isolated and effectively removed so that the die can be reclaimed as a part that does not include that module?'

  There are techniques that can be applied which will allow both the re-use of existing silicon to rep- resent a new device with less functionality, and to be able to reclaim bad die that has localized defects or design errors contained within a module or modules.

housing of these different variations. If a full-featured design were structured in such a way as to allow easy disabling of various modules, then one full- featured design could emulate all of the various deriv- ative products, and thus, make parts available almost immediately. There is an economic advantage to redesigning the derivative products without the non- necessary liurctions (cost of silicon). If derivative prod- ucts were available early, then the choice of which derivative product to actually implement in a downsized version could wait for market acceptance.

  If the original full-featured design can be made to emulate the derivative products, then there is a need for the user to be able to identify the device correctly. For example, the 68060 has on-board iden- tification registers accessible to the programmer via sothvare, and to the board manufacturer via the JTAG interface. Reducing the functionality ofa full-featured part would also require the user to identify the part as a reduced part when the identifications registers are interrogated.

  It is also very attractive to change the test mode fimctionality so that the non-necessary circuitry is not tested, and doesn't interfere with the testing of targeted circuitry. This reduces the time involved with running the test program, reduces the cost of test, and allows a high yield with a minimum of complexity (a recent analysis has shown that yield reclaim could be as high as 37% in some cases).

  If the choice of which derivative product is being made from a hill-featured part can b...