Browse Prior Art Database

IMPROVED NARROW TRENCH PROFILE USING A COMPOSITE SPACER PROCESS

IP.com Disclosure Number: IPCOM000007791D
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2002-Apr-24
Document File: 2 page(s) / 97K

Publishing Venue

Motorola

Related People

Lisa K. Garling: AUTHOR [+2]

Abstract

An advanced silicon integrated circuit process utilizes a sub-micron trench extending through a layer of polysilicon over single crystal silicon. The profile and depth of this narrow trench impact the characteristics of the device and therefore must be well controlled. Two approaches to define this trench are described and illustrated below. The Composite Spacer Process represents a significant improvement over the Niide Spacer Process and has been shown to reduce the overall variability ofthe trench. cut region may be difficult to refill with some mate- rials (such as furnace TEOS) during subsequent processing steps without leaving a void.

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8 M-LA Technical Developments

IMPROVED NARROW TRENCH PROFILE USING A COMPOSITE SPACER PROCESS

by Lisa K. Garling and James A. Kirchgessner

  An advanced silicon integrated circuit process utilizes a sub-micron trench extending through a layer of polysilicon over single crystal silicon. The profile and depth of this narrow trench impact the characteristics of the device and therefore must be well controlled. Two approaches to define this trench are described and illustrated below. The Composite Spacer Process represents a significant improvement over the Niide Spacer Process and has been shown to reduce the overall variability ofthe trench.

cut region may be difficult to refill with some mate- rials (such as furnace TEOS) during subsequent processing steps without leaving a void.

   The Nitride Spacer Process relies upon the for- mation of a Si3N4 (nitride) sidewall spacer to selectively mask the formation of a Si02 (oxide) hardmask. AAer the nitride spacer is removed by wet etch, the trench is reactively ion etched using a chemistry highly selective to the oxide hardmask. During the spacer removal step, due to the asym- metric shape of the spacer and adjacent topography, the spacer clears in such a way as to non-uniformly expose the underlying polysilicon to the wet spacer etch. Due to the limited selectivity of the spacer etch to polysilicon, significant variability and asymmetry in the shape and depth ofthe final trench profile can result. The isotropic wet etch required to clear the spacer will also undercut the nitride layer (ipresent) in the adjacent material stack. This under-

  The Compoeite Spacer Process utilizes a thin nitride layer followed by a mmace TEOS layer in...