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Method for a silicon substrate noise isolation technique through package technology

IP.com Disclosure Number: IPCOM000007805D
Publication Date: 2002-Apr-24
Document File: 7 page(s) / 78K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a silicon substrate noise isolation technique through package technology. Benefits include improved signal quality and improved performance.

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Method for a silicon substrate noise isolation technique through package technology

Disclosed is a method for a silicon substrate noise isolation technique through package technology. Benefits include improved signal quality and improved performance.

Background

              High speed signaling is a requirement for all communications chips. To be competitive, the cost of the product should be minimal. The major cost component of the product includes the package in which the die is enclosed. Package technologies range from low cost, low bandwidth packages (less than $1 each) to expensive high-bandwidth packages (more than $100 each). The selection of the package is based on performance requirements. Package design optimization of the low-cost package technologies can extend the bandwidth of the package, allowing their use for high-speed applications.

              High-speed signals, greater than 10 GHz, are not required to travel through vias. These signals can be routed in a co-planar method on a solder ball layer without the use of wire bonding.

              All devices on the silicon typically share the silicon substrate. At high frequencies, substrate noise coupling from a noisy block on the chip to a highly sensitive block becomes a limiting factor to the highest usable frequency of the device (see Figures 1). Noise inducing sources on the die include N-wells and interconnects (see Figure 2) on the die that capacitive couple into the substrate, which is shared by sensitive analog circuits (see Figure 3). Many techniques are employed in the industry to mitigate these effects. For example, spacing out the blocks causes the die size to grow and increases product cost. Adding guard rings become less effective as the frequency increases. To connect guard rings to the external ground, extra pads are required on die, which can grow the die size if the die size is pad limited and/or dense.

              Wire-bond packages (see Figure 4) are a staple packaging technology. They are used to get signals off the die, onto the substrate, and out to the system board. Wire-bond packages provide the opportunity for backside conduction but act as uncontrolled impedance elements. While somewhat of a concern for medium speed signals up to 300 MHz, wire bonds become a package-technology limiter when signaling speeds reach into the giga-hertz range. Wire bonds attenuate the signal levels, degrade the edge rates and introduce jitter/skew into the system. The result is faulty data transmission and degraded bit error rates, which is one of the most important factors while marketing a high-speed networking product. These drawbacks limit the use of wire-bond...