Browse Prior Art Database

SELECTIVE READ ACCESS FOR POWER MINIMIZATION

IP.com Disclosure Number: IPCOM000007823D
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2002-Apr-25
Document File: 1 page(s) / 53K

Publishing Venue

Motorola

Related People

Jose A. Lyon: AUTHOR [+2]

Abstract

FIELD OF THE INVENTION This invention will reduce power during read accesses of multiport register tiles.

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Technical Developments

SELECTIVE READ ACCESS FOR POWER MINIMIZATION

by Jose A. Lyon and Cody Croxton

FIELD OF THE INVENTION

This invention will reduce power during read accesses of multiport register tiles.

BACKGROUND OF THE INVENTION

  On previous microprocessor designs, multiport register read accesses were done with all read ports enabled regardless of whether all ports were needed by the executing instruction. During the access of some instructions, this may mean that of n read ports being accessed only n-l or less porta may be providing data that is used by the instruction. Ifthis is true, then the accesses to the registers are bum- ing power that accomplishes no usem work. This type of behavior must be avoided in a low power microprocessor.

DESCRIPTION OF THE INVENTION

  The invention is to selectively control each read ports enable based on the needed operands. In order to do this, each read port must have decode infor-

mation that tells it whether or not that ports operand is needed in that cycle. The generic read port equa- tions are shown below:

reX=a&b
a) valid instruction
b) source X needed

  The real equations may vary between implemen- tations, but the key point is that only the needed ports are accessed based on the operands that the current instruction needs. This is done through the source X needed term in the above equation and should be done for each individual read port enable. This scheme can result in significant power saving depending on its appl...