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Browse Prior Art Database

IMPROVED SILICON CONTOURING PROCESS

IP.com Disclosure Number: IPCOM000007839D
Original Publication Date: 1996-Nov-01
Included in the Prior Art Database: 2002-Apr-29
Document File: 2 page(s) / 58K

Publishing Venue

Motorola

Related People

John Gunnison: AUTHOR [+2]

Abstract

Wet chemical etching ofunmasked silicon regions is performed in semiconductor discrete processing to form deep moat and mesa device terminations. The contour of resulting moat/mesa silicon sidewall is very steep and leads to inadequate (thin or miss- ing) photoglass at the top of the silicon step (see Figure 1). In addition, the sidewall's large negative contour angle acts to limit the junction's bulk break- down voltage. An improved moat/mesa silicon contouring process was achieved using overlapping silicon etch regions. The following four factors were found to control the moat/mesa contour: 1) Mesa 2-to-Mesa 1 overlap spacing 2) Mesa 1 and Mesa 2 etch depths 3) Mesa 1 and Mesa 2 etch depth sequence 4) Choice of mask sequence The Mesa 1 photo/etch process is followed by a second photo/etch process that utilizes an oversized Mesa 2 mask. By proper selection of the Mesa 1 and Mesa 2 etch depths, respectively, the moat/mesa side- walls can be optimally recontoured (see Figure 2 and 3). Recontoured sidewalls have a much smaller contour angle which offers superior photoglass step coverage and improved electrical parameters.

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Technical Developments

IMPROVED SILICON CONTOURING PROCESS

by John Gunnison and Mark Schoenberg

  Wet chemical etching ofunmasked silicon regions is performed in semiconductor discrete processing to form deep moat and mesa device terminations. The contour of resulting moat/mesa silicon sidewall is very steep and leads to inadequate (thin or miss- ing) photoglass at the top of the silicon step (see Figure 1). In addition, the sidewall's large negative contour angle acts to limit the junction's bulk break- down voltage. An improved moat/mesa silicon contouring process was achieved using overlapping silicon etch regions. The following four factors were found to control the moat/mesa contour:

1) Mesa 2-to-Mesa 1 overlap spacing
2) Mesa 1 and Mesa 2 etch depths
3) Mesa 1 and Mesa 2 etch depth sequence
4) Choice of mask sequence

  The Mesa 1 photo/etch process is followed by a second photo/etch process that utilizes an oversized Mesa 2 mask. By proper selection of the Mesa 1 and Mesa 2 etch depths, respectively, the moat/mesa side- walls can be optimally recontoured (see Figure 2 and 3). Recontoured sidewalls have a much smaller contour angle which offers superior photoglass step coverage and improved electrical parameters.

I

Photoglass

Fig. 1

I November 1996

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Technical Developments

Fig. 2

Fig. 3

B Mmorda. 1°C. 19%

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