Browse Prior Art Database

TFSOI WITH IMPROVED OXIDATION RESISTANCE (TO REDUCE ISOLATION INDUCED STRESSES AND LEAKAGE)

IP.com Disclosure Number: IPCOM000007931D
Original Publication Date: 1996-Nov-01
Included in the Prior Art Database: 2002-May-07
Document File: 2 page(s) / 188K

Publishing Venue

Motorola

Related People

N. David Theodore: AUTHOR [+3]

Abstract

Thin-film silicon-on-insulator (TFSOI) technol- ogy is being evaluated for low-power applications where controlling off-state leakage is of critical impor- tance. The current art involves conventional LOCOS isolation on TFSOI substrates . This tech- nique has the following problem. Once the super- frcial-Si in the LOCOS window is completely oxi- dized, oxygen diffuses through the resulting oxide (and the TFSOI buried oxide) to react with the substrateSi. The volume expansion associated with oxidation of the substrate-Si causes localized bend- ing of adjacent superficial-Si . This bend- ing causes stresses, dislocations and associated elec- trical leakage in TFSOI devices. Our invention is designed to minimize such bending of the super- ficial-Si and thus eliminate oxidation induced stresses, dislocations and electrical leakage.

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M-ROLA Technical Developments

8

TFSOI WITH IMPROVED OXIDATION RESISTANCE (TO REDUCE ISOLATION INDUCED STRESSES AND LEAKAGE)

by N. David Theodore, Marco Racanelli, and Tom Wetteroth

tional TFSOI substrate by implanting N, through LOCOS windows into the buried oxide and annealing to create a buried oxynitride diffusion barrier that is localized within LOCOS windows <Fig. 3c>. An alternative technique is a high temperature N, anneal during SIMOX/ BESOI substrate fabrication <Fig. 3d>.

  We have fabricated devices on TFSOI substrates with such a diffusion barrier created by annealing the SIMOX wafer in a nitrogen ambient. We also fabricated comparable devices on TFSOI substrates without incorporating a diffusion barrier. Figure 4a presents a table showing the peak stresses in the superficial silicon adjacent to LOCOS regions for Ar annealed (with no diffusion barrier) and for N, annealed (with a diffusion barrier) wafers. We find that the peak stress drops as much as 50% as a result of the nitrogen anneal (to form the diffusion barrier prior to LQCOS fabrication). Furthermore, the pres- ence of stress induced defects is reduced. Figure 4b shows electrical leakage measurements obtained horn devices fabricated on the Ar annealed (no diffusion barrier) and N, annealed (with a diffusion barrier) wafers. The N, anneal causes a clear drop in the high leakage outliers. The technique has success- fully reduced stresses, defects, and electrical leak- age in TFSOI devices.

  Potential applications for our invention include integrated devices on TFSOI substrates. The devices can be fabricated with reduced electrical leakage. TFSOI technology is being evaluated for low-power applications where controlling off-state leakage is of critical importance.

INTRODUCTION

  Thin-film silicon-on-insulator (TFSOI) technol- ogy is being evaluated for low-power applications where controlling off-state leakage is of critical impor- tance. The current art involves conventional LOCOS isolation on TFSOI substrates <Fig. I>. This tech- nique has the following problem. Once the super- frcial-Si in the LOCOS window is completely oxi- dized, oxygen diffuses through the resulting oxide (and the TFSOI buried oxide) to react with the substrateSi. The volume expansion associated with oxidation of the substrate-Si causes localized bend- ing of adjacent superficial-Si <Fig. 2>. This bend- ing causes stresses, dislocations and associated elec- trical leakage in TFSOI devices. Our invention is designed to minimize such bending of the super- ficial-Si and thus eliminate oxidation induced stresses, dislocations and electrical leakage.

DESCRIPTION OF OUR INVENTION AND ITS OPERATION:

  Incorporate an oxynitride (or N-doped oxide) diffusion barrier at...