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DEVICE AND METHOD TO SUPPRESS INJECTED SUBSTRATE CURRENT

IP.com Disclosure Number: IPCOM000007952D
Publication Date: 2002-May-07

Publishing Venue

The IP.com Prior Art Database

Abstract

A protection device for a semiconductor device (100) having a high voltage device and a low voltage device is disclosed. The device includes a n+ drain region (110) belonging to the high voltage device. A first collector terminal (115) formed as a contact to an n-region (114) and a second collector terminal (119) offset from the first collector terminal (115) formed as a contact to an n-region (118) are also provided. A highly doped p+ region (102) is formed by implanting a high concentration of dopants into the device (100). A protection transistor is formed by the drain region (110), a p region (102) and the first collector terminal (115), and a parasitic transistor is formed by the drain region (110), the highly doped p+ region (102) and the second collector (119). Due to the highly doped p+ region (102), the majority of current injected at the drain is collected at the first collector (115), protecting the low voltage device (122).

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DEVICE AND METHOD TO SUPPRESS INJECTED SUBSTRATE CURRENT

FIELD OF THE INVENTION

             This invention relates to semiconductor device and more specifically to a device and method to suppress injected substrate current. 

BACKGROUND

             Modern electronic devices often operate at high power and as such require high power components such as semiconductor devices to operate.  One type of high power devices are smart power integrated circuits.  These devices integrate a high voltage device with a low voltage circuit isolated by a p-n junction.  These devices are often used in the automotive industry.

     One drawback to these devices is that during turn on operation or during specific transients, negative voltage spikes appear on the drain terminal of the high voltage device.  This is due to an inductive load in the external circuit.  This causes minority carrier flow to be injected into the device.  The flow then propagates in the isolated substrate.  In the device structure, lateral parasitic n-p-n transistors exists in the device between the N+ drain, low doped p-substrate, and the positive biased N+ region of a bipolar metal oxide transistor in the adjacent low voltage circuit.  While some of the injected minority carrier flow is collected at a grounded top contact of the substrate, most of the current is collected at a positively biased N+ contact adjacent to the low voltage device.  If the density of the parasitic flow is too great and a large amount of current is collected near the low voltage device, a destructive latch-up phenomena or alteration of the analog signal is observed in the low voltage circuit.  This results in cross talk between the high voltage and low voltage devices and disrupts normal functions of devices in the low voltage circuit. 

     Several ways haven been proposed to solve this problem.  One way is to provide an external device (such as a diode) between the load and the switched on N+ drain of the high voltage device.  This approach tends to be expensive.  Another way is to provide an additional N-epi layer isolated from the high voltage device by a first isolation ring and from the low voltage circuit with a second isolation ring.  The isolation rings are located between the high voltage and low voltage parts of the circuit with a collector in the middle.  The isolation rings are separated by a certain distance.  This distance forms a long diffusion length for the minority carrier flow, which decreases common base current gain.  The drawback to this approach is that it is unable to effectively provide protection without a sufficiently large distance between the isolation rings. This decreases the number of devices that can be made per wafer, leading to increased costs.  What is needed is a way to suppress injected substrate currents near the low voltage device.

BRIEF DESCRIPTION OF THE DRAWINGS

             For a more complete understanding of the device and advantages thereof, reference is now made to the following descriptions in which like reference numerals repres...