Browse Prior Art Database

BACKSIDE COOLING METHOD FOR POWER DEVICES

IP.com Disclosure Number: IPCOM000007954D
Original Publication Date: 1996-Nov-01
Included in the Prior Art Database: 2002-May-08
Document File: 2 page(s) / 81K

Publishing Venue

Motorola

Related People

Leonard J. Borucki: AUTHOR [+3]

Abstract

Analysis has shown that future technology to be employed in power device designs wihhkely result in higher than desirable temperatures behrg gener- ated during device operation. Since the conduction lengths (Z W, where a is the thermal diffusivity) characteristic of silicon are much smaller than typi- cal substrate thicknesses, the heat generated during high power operation cannot be removed effectively Under such conditions, the temperature rise due to this heat generation scales as: EIA ATmax cc ,Cpkr)1t2 where E/A is the energy per unit device area gener- ated, p is the material density, C, is the material heat capacity, k is the material thermal conductivity, and I is the time associated with thermal transients (e.g., the time over which heat must be dissipated). Two options are available to reduce this maximum temperature: (i) mechanically thin the substrate to below the conduction length of silicon, or (ii) replace low (p C k)'12 material (e.g., silicon) with high (p C, k$ material (see Figure 1).

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8 MolvRoLA Technical Developments

BACKSIDE COOLING METHOD FOR POWER DEVICES

by Leonard J. Borucki, Erik W. Egan and Thomas E. Zirkle

  Analysis has shown that future technology to be employed in power device designs wihhkely result in higher than desirable temperatures behrg gener- ated during device operation. Since the conduction lengths (Z W, where a is the thermal diffusivity) characteristic of silicon are much smaller than typi- cal substrate thicknesses, the heat generated during high power operation cannot be removed effectively Under such conditions, the temperature rise due to this heat generation scales as:

EIA

ATmax cc ,Cpkr)1t2

where E/A is the energy per unit device area gener- ated, p is the material density, C, is the material heat capacity, k is the material thermal conductivity, and I is the time associated with thermal transients
(e.g., the time over which heat must be dissipated). Two options are available to reduce this maximum

temperature: (i) mechanically thin the substrate to below the conduction length of silicon, or (ii) replace low (p C k)'12 material (e.g., silicon) with high (p C, k$ material (see Figure 1).

  Since option (i) is clearly impractical, a method for achieving option (ii) is proposed. The substrate would be thinned to some reasonable thickness, then isotropically wet-etched on the backside to produce pockets deep enough to reach inside the diffusion length of silicon, or to within about 30-45 gm of the top, active surface. The...