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Low Power Startup Circuits for Current Reference

IP.com Disclosure Number: IPCOM000008005D
Original Publication Date: 2002-May-10
Included in the Prior Art Database: 2002-May-10
Document File: 5 page(s) / 1M

Publishing Venue

Motorola

Related People

Qadeer Ahmad Khan: AUTHOR [+2]

Related Documents

U.S. 5,867,013: PATENT [+5]

Abstract

Three new startup circuits for current reference are proposed. Unlike conventional startup circuits, the proposed circuits completely turn off once the reference circuit is started and consumes no power in the normal operation of the reference circuits. The first two circuits operate with only power down signal while the third circuit has been implemented to work with both power down and VDD ramp up. The circuits are quite useful and economical in low power integrated circuit design. The proposed circuits can also be used in voltage reference as well and very low startup time can be achieved.

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Low Power Startup Circuits for Current Reference

Qadeer Ahmad Khan and Kulbhushan Misri

Abstract: - Three new startup circuits for current reference are proposed.  Unlike conventional startup circuits, the proposed circuits completely turn off once the reference circuit is started and consumes no power in the normal operation of the reference circuits.  The first two circuits operate with only power down signal while the third circuit has been implemented to work with both power down and VDD ramp up.  The circuits are quite useful and economical in low power integrated circuit design.  The proposed circuits can also be used in voltage reference as well and very low startup time can be achieved.

Introduction

A startup circuit plays a very significant role in voltage and current reference circuits.  The startup circuit brings out the reference circuit from dead (zero current) operating point to its normal operating point and then remains unused once the reference circuit starts operating properly.  A conventional startup circuit [1-3] continues to consume constant current even after startup and thus increases the total power consumption of the circuit, which is undesirable in low power integrated circuits.  Here, we have proposed three new startup circuits that overcome the above drawback as they turn off completely once the current reference circuit starts operating properly.

Description of the proposed circuits

Three different implementations of the proposed topology, namely, startup circuit with pull-up current source, startup circuit with pull-down current source and startup circuit with VDD ramp and power down are described below.

1.  Startup circuit with pull-up current source:

Case-1: pwd=1:

As shown in Fig.1, the startup circuit employs one nmos (M4) and three pmos (M3, M5 and M6) transistors.  When the power down signal pwd is asserted, the transistor M5 is off and M4 causes M6 to turn on due to zero voltage at ctrl node.  Since M6 is in series with M5, the startup current Istart will be zero in this case.   The nodes pbias and nbias will be set at VDD and VSS, respectively.  Transistor M3 is off and there will be no current in the reference circuit.  

 
 

Current Reference

 
 

Startup Circuit

 
            

Fig.1  Startup Circuit with pull-up current source

Case-2: pwd=0:

When the pwd signal is released, transistor M4 is turned off and M5 is turned on.  Since M3 remains off, the node ctrl will remain at 0V(since there is no pull-up path to this node) and will cause the transistor M6 to remain on.  Now both M5 and M6 are on and hence there will be a current Istart flowing into the node nbias.  The initial value of this current will depend upon the sum of the on resistance of M5 and M6.  The current Istart will begin charging the node nbias from 0V to some positive value and and hence the pbias will be discharged from VDD to certain value through transistor M10 and resistor R0.  As the voltage pbias reaches a value that is less than VDD - |VT(M3)|, the transistor M3 is turned on...