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CMOS BANDGAP CIRCUIT

IP.com Disclosure Number: IPCOM000008042D
Original Publication Date: 1997-Mar-01
Included in the Prior Art Database: 2002-May-14
Document File: 3 page(s) / 152K

Publishing Venue

Motorola

Related People

Andreas Rusznyak: AUTHOR

Abstract

In order to generate stable reference voltages the so-called CMOS bandgap voltage reference cir- cuit is often used. See for example the article by B.S. Song, P.R. Gray: A Precision Curvature- Compensated CMOS Bandgap Reference, IEEE Journal of Solid-State Circuits, Vol. SC-18, No 6, December 1984, pages 634-643).

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MOTOROLA Technical Developments

CMOS BANDGAP CIRCUIT

by Andreas Rusznyak

  In order to generate stable reference voltages the so-called CMOS bandgap voltage reference cir- cuit is often used. See for example the article by
B.S. Song, P.R. Gray: A Precision Curvature- Compensated CMOS Bandgap Reference, IEEE Journal of Solid-State Circuits, Vol. SC-18, No 6, December 1984, pages 634-643).

  The principle used in the circuit described in the above referenced article, as with many other similar circuits, is based on adding two voltages whose temperature coefficients have opposite signs. One voltage is generated by a current of a given amount flowing through a diode or bipolar transistor result- ing in a negative temperature coefficient and the other voltage is obtained across a first resistor through which a current flows whose value is defined by the voltage difference on two diodes or bipolar transistors operating on different current density levels and by a second resistor,

  Another implementation of the CMOS bandgap reference circuit is shown in the paper 'Programmable CMOS Dual Channel Interface Processor' written by Ahuja et al (IEEE Journal of Solid State Circuits, Vol. SC-19, No 6, December 1984, pages 896-897). This implementation shows how the reference voltage can be generated using current mirrors. Also, it is shown how the applica- tion of stacked bipolar transistors improves perfor- mance of the circuit.

  The Ahuja circuit generates a reference voltage whose value is a multiple of that generated by a cir- cuit without stacked transistors. The reference volt- age for a circuit without stacked transistors is approximately 1.23X

  The Ahuja circuit is therefore unsuitable for use in low voltage systems having a DC supply voltage of 3V or less. In such systems, the Ahuja circuit does not allow the generation of a reference voltage

which is a multiple of 1.235V because adding the required voltage for the current sources results in higher supply voltages than are available.

  An additional problem of both the above described circuits is their sensitivity to leakage cur- rent on the output of the circuit. If the current sourced to or sunk from the output of these circuits is in the same order of magnitude as the current which generates the reference voltage, the value of the reference voltage will be altered significantly.

The aim of the invention is to overcome the above mentioned problems of the known circuits..

  Figure 1 shows a known voltage reference cir- cuit. With such a circuit the reference voltage can be generated on nodes N3 or N4. Operational amplifier A establishes the same voltage on node Nl as on node N2. Current generators M3 and M4 deliver the same currents such that the voltage drop across resistances R2 and R3 (R2 = R3) will have identical values and nodes N3, N4 will be at the same voltage level.

  If one of these nodes is used as an output of the voltage reference circuit, a leakage current on the output node will modi...